IP Library Granted Patent US 8,782,299
Granted Patent B2
US 8,782,299 · App. 12/768,448 · Granted Jul 15, 2014

Re-configurable multi-purpose digital interface

Inventors: Mitch Fletcher (Glendale, AZ); Jef Sloat (Phoenix, AZ); Michael R. Gregg (Sun City, AZ)
Assignee: Honeywell International Inc.
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Quick Facts
Patent No.
US 8,782,299
App. No.
12/768,448
Granted
Jul 15, 2014
Kind
B2
Abstract

Systems and apparatus are provided for a reconfigurable, multi-purpose input/output (I/O) interface. The system comprises a comparator coupled to a means for signal generation. The system further comprises a switch fabric configured to reconfigure the I/O circuit in real time to perform a variety of signal processing, signal generation and built-in-test functions.

Claims (24)

1. A digital input/output (I/O) circuit re-configurable to perform a plurality interface functions, the digital I/O circuit comprising:

means for biasing a input signal when the digital I/O circuit is in a first configuration and for attenuating the input signal when the digital I/O circuit is in a second configuration, the means for biasing and attenuating comprising an input and an output;

means for comparing the input signal to a threshold voltage having a first input and a second input, the first input and the second input of the means for comparing being connected to the output of the means for biasing and attenuating;

means for transmitting an output signal from the digital I/O circuit that is the input of the means for biasing and attenuating; and

means for re-configuring the digital I/O circuit between the first configuration, and the second configuration.

2. The digital I/O circuit of claim 1 , wherein the means for biasing and attenuating is also a means for powering the digital interface circuit in a third configuration.

3. The digital I/O circuit of claim 1 , further comprising a means for injecting a wetting current to an external switch coupled to the input of the means for biasing and attenuating.

4. The digital I/O circuit of claim 1 , further comprising a means for switchably connecting one of a plurality of threshold voltages to a second input of the means for comparing.

5. The digital I/O circuit of claim 1 , wherein the means for transmitting comprises a plurality of means for injecting various DC voltages at the input of the means for biasing and attenuating.

6. The digital I/O circuit of claim 5 , wherein the means for transmitting comprises a means for grounding the input of the means for biasing and attenuating.

7. The digital I/O circuit of claim 1 , wherein the means for re-configuring the digital I/O circuit between the first configuration, and the second configuration is driven by a configuration logic.

8. The digital I/O circuit of claim 1 , wherein the means for re-configuring is a switch fabric.

9. An input/output (I/O) cell comprising:

a plurality of switch drivers;

a computing device configured to control the plurality of switch drivers; and

a reconfigurable I/O circuit adapted to periodically receive an input signal and to periodically transmit an output signal, the I/O circuit comprising:

means for biasing the input signal when the digital I/O circuit is in a first configuration and for attenuating the input signal when the digital I/O circuit is in a second configuration, the means for biasing and attenuating comprising an input and an output,

means for comparing the input signal to a threshold voltage, the input of the means for comparing being connected to the output of the means for biasing and attenuating,

at least two signal input/output pins that function as both the physical output for an output signal from the digital I/O circuit and a physical input for the means for biasing and attenuating, and

means for re-configuring the digital I/O circuit between the first configuration, and the second configuration in response to the switch drivers.

10. The I/O cell of claim 9 , further comprising a configuration data and status register in communication with the switch drivers and the computing device.

11. The I/O cell of claim 10 further comprising a digital-to-analog converter (DAC), the DAC being configured to provide an adjustable threshold voltage to the means for comparing.

12. The I/O cell of claim 11 , further comprising a means for switchably connecting one of a plurality of fixed threshold voltages and the DAC to the means for comparing.

13. The I/O cell of claim 9 , wherein the means for transmitting comprises a plurality of means for injecting various DC voltages at the input of the means for biasing and attenuating.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 27, 2010
From: FLETCHER, MITCH; SLOAT, JEF; GREGG, MICHAEL R.
To: HONEYWELL INTERNATIONAL INC.
Reel/Frame 024297/0177 →
Continuity (1)
Related Publication 20110264834A1 · Oct 27, 2011