IP Library Granted Patent US 8,782,369
Granted Patent B2
US 8,782,369 · App. 13/296,278 · Granted Jul 15, 2014

Apparatus to manage efficient data migration between tiers

Inventors: Anant Baderdinni (Norcross, GA); Gerald E. Smith (Boulder, CO); Mark Ish (Sandy Springs, GA)
Assignee: LSI Corporation
G06F3/0646G06F3/0647G06F3/064
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Quick Facts
Patent No.
US 8,782,369
App. No.
13/296,278
Granted
Jul 15, 2014
Kind
B2
Abstract

A data storage system having a slow tier and a fast tier maintains hot data on the fast tier by migrating data from the slow tier to reserve space on the fast tier as data becomes hot over time. The system maintains a reserve space table and performs a mass migration of data from the fast tier to the slow tier. Data migration is frequently unidirectional with data migrating from the slow to the fast tier, reducing overhead during normal operation.

Claims (48)

1. A data storage apparatus comprising:

a processor;

a first data storage device connected to the processor, configured to store a reserve space table of unmapped data blocks; and

a second data storage device connected to the processor,

wherein:

the first data storage device has a relatively faster access time than the second data storage device;

the reserve space table is configured to identify discrete portions of the first data storage device and discrete portions of the second data storage device; and

the processor is configured to:

transfer data from a discrete portion of the second data storage device to a discrete portion of the first data storage device identified in the reserve space table;

after transferring data from the discrete portion, add a location of the discrete portion of the second data storage device to the reserve space table and remove a location of the discrete portion of the first data storage device from the reserve space table;

transfer data from a plurality of discrete portions of the first data storage device to a plurality of discrete portions of the second data storage device;

after transferring data from the plurality of discrete portions add a plurality of locations, each associated with one of the plurality of discrete portions of the first data storage device to the reserve space table and remove a plurality of locations, each associated with one of the plurality of discrete portions of the second data storage device from the reserve space table.

2. The data storage apparatus of claim 1 , wherein the processor is further configured to monitor a distribution of locations in the reserve space table between the first data storage device and the second data storage device.

3. The data storage apparatus of claim 1 , wherein the first data storage device comprises one or more solid state drives.

4. The data storage apparatus of claim 1 , wherein the second data storage device comprises one or more hard disk drives.

5. The data storage apparatus of claim 1 , wherein the processor is further configured to prohibit data access operations to any location identified in the reserve space table.

6. A data storage apparatus comprising:

a processor;

a first data storage device connected to the processor, configured to store a reserve space table of unmapped data blocks; and

a second data storage device connected to the processor,

wherein:

the first data storage device has a relatively faster access time than the second data storage device;

the reserve space table is configured to identify discrete portions of the first data storage device and discrete portions of the second data storage device; and

the processor is configured to:

transfer data from a discrete portion of the second data storage device to a discrete portion of the first data storage device identified in the reserve space table;

after transferring data from the discrete portion, add the discrete portion of the second data storage device to the reserve space table and remove the discrete portion of the first data storage device from the reserve space table.

7. The data storage apparatus of claim 6 , wherein the processor is further configured to monitor a distribution of locations in the reserve space table between the first data storage device and the second data storage device.

8. The data storage apparatus of claim 7 , wherein the processor is further configured to:

transfer data from a plurality of discrete portions of the first data storage device to a plurality of discrete portions of the second data storage device when the distribution of locations in the reserve space table exceeds a threshold;

after transferring data from the plurality of discrete portions, add a plurality of locations, each associated with one of the plurality of discrete portions of the first data storage device to the reserve space table and remove a plurality of locations, each associated with one of the plurality of discrete portions of the second data storage device from the reserve space table.

9. The data storage apparatus of claim 8 , wherein the threshold is eighty percent of all locations identified in the reserve space table referencing a location on the second data storage device.

10. The data storage apparatus of claim 6 , wherein the processor is further configured to monitor a system usage metric.

11. The data storage apparatus of claim 10 , wherein the processor is further configured to:

transfer data from a plurality of discrete portions of the first data storage device to a plurality of discrete portions of the second data storage device when the system usage metric is below a threshold;

after transferring data from the plurality of discrete portions, add a plurality of locations, each associated with one of the plurality of discrete portions of the first data storage device to the reserve space table and remove a plurality of locations, each associated with one of the plurality of discrete portions of the second data storage device from the reserve space table.

12. The data storage apparatus of claim 6 , wherein the first data storage device comprises one or more solid state drives.

13. The data storage apparatus of claim 6 , wherein the second data storage device comprises one or more hard disk drives.

14. The data storage apparatus of claim 6 , wherein the processor is further configured to prohibit data access operations to any location identified in the reserve space table.

15. A method for migrating data between tiers in a data storage system, comprising:

transferring data from a discrete portion of a slow data storage device to discrete portion of a fast data storage device;

after transferring data from the discrete portion, adding the discrete portion of the slow data storage device to a reserve space table and removing the discrete portion of the fast data storage device from the reserve space table of unmapped data blocks.

16. The method of claim 15 , further comprising monitoring a distribution of locations in the reserve space table between the slow data storage device and the fast data storage device.

17. The method of claim 16 , further comprising:

transferring data from a plurality of discrete portions of the fast data storage device to a plurality of discrete portions of the slow data storage device when the distribution of locations in the reserve space table exceeds a threshold;

after transferring data from the plurality of discrete portions adding a plurality of locations, each associated with one of the plurality of discrete portions of the fast data storage device to the reserve space table and removing a plurality of locations, each associated with one of the plurality of discrete portions of the slow data storage device from the reserve space table.

18. The method of claim 17 , wherein the threshold is eighty percent of all locations identified in the reserve space table referencing a location on the slow data storage device.

19. The method of claim 15 , wherein the fast data storage device comprises one or more solid state drives.

20. The method of claim 15 , further comprising prohibiting data access operations to any location identified in the reserve space table.

Assignments (9)
CORRECTIVE ASSIGNMENT TO CORRECT THE ERROR IN RECORDING THE MERGER IN THE INCORRECT US PATENT NO. 8,876,094 PREVIOUSLY RECORDED ON REEL 047351 FRAME 0384. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER. Recorded Mar 8, 2019
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 049248/0558 →
CORRECTIVE ASSIGNMENT TO CORRECT THE EFFECTIVE DATE OF THE MERGER PREVIOUSLY RECORDED AT REEL: 047230 FRAME: 0910. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER. Recorded Oct 29, 2018
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 047351/0384 →
MERGER Recorded Oct 4, 2018
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 047230/0910 →
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENTS Recorded Feb 3, 2017
From: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 041710/0001 →
PATENT SECURITY AGREEMENT Recorded Feb 11, 2016
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
Reel/Frame 037808/0001 →
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENT RIGHTS (RELEASES RF 032856-0031) Recorded Feb 2, 2016
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: LSI CORPORATION; AGERE SYSTEMS LLC
Reel/Frame 037684/0039 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 3, 2015
From: LSI CORPORATION
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 035390/0388 →
PATENT SECURITY AGREEMENT Recorded May 8, 2014
From: LSI CORPORATION; AGERE SYSTEMS LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 032856/0031 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 15, 2011
From: BADERDINNI, ANANT; SMITH, GERALD E.; ISH, MARK
To: LSI CORPORATION
Reel/Frame 027226/0127 →
Continuity (1)
Related Publication 20130124780A1 · May 16, 2013