IP Library Granted Patent US 8,798,121
Granted Patent B2
US 8,798,121 · App. 11/801,638 · Granted Aug 5, 2014

High speed data bus for communicating between wireless interface devices of a host device

Inventors: Prasanna Desai (Olivehain, CA); Mark Gonikberg (Los Altos Hills, CA); Brima B. Ibrahim (Aliso Viejo, CA); Edward H. Frank (Atherton, CA)
Assignee: Broadcom Corporation
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Quick Facts
Patent No.
US 8,798,121
App. No.
11/801,638
Granted
Aug 5, 2014
Kind
B2
Abstract

A circuit includes a first wireless interface circuit that communicates packetized data to a first external device in accordance with a first wireless communication protocol. A second wireless interface circuit communicates packetized data to a second external device in accordance with a second wireless communication protocol. A plurality of signal lines communicate at least four lines of cooperation data between the first wireless interface circuit and the second wireless interface circuit, wherein the cooperation data relates to cooperate transceiving in a common frequency spectrum.

Claims (27)

1. A circuit comprises:

a first wireless interface circuit that communicates packetized data in a common frequency spectrum to a first external device in accordance with a first wireless communication protocol;

a second wireless interface circuit that communicates packetized data in the common frequency spectrum to a second external device in accordance with a second wireless communication protocol; and

a plurality of signal lines, coupled to the first wireless interface circuit and the second wireless interface circuit, that communicate cooperation data between the first wireless interface circuit and the second wireless interface circuit, wherein the cooperation data is used by the first wireless interface circuit and the second wireless interface circuit to limit interference between the packetized data communicated in accordance with the first wireless communication protocol and the packetized data communicated in accordance with the second wireless communication protocol in the common frequency spectrum, wherein the cooperation data includes intra-device status messages between the first wireless interface circuit and the second wireless interface circuit that indicate when transmission of the packetized data is currently in progress and when reception of the packetized data is currently in progress by a selected one of: the first wireless interface circuit and the second wireless interface circuit, in accordance with one of: the first wireless communication protocol; and the second wireless communication protocol in the common frequency spectrum.

2. The circuit of claim 1 wherein the first wireless interface circuit includes a first processing module and the second wireless interface circuit includes a second processing module and wherein the plurality of signal lines communicate cooperation data between the first processing module and the second processing module.

3. The circuit of claim 2 wherein the plurality of signal lines communicate cooperation data between the first processing module and the second processing module for each transceived packet of the first wireless interface circuit.

4. The circuit of claim 1 wherein the plurality of signal lines are part of a high speed data bus for parallel communication of the intra-device status messages between the first wireless interface circuit and the second wireless interface circuit.

5. The circuit of claim 1 wherein the second wireless interface circuit operates in accordance with a wireless local area network protocol that includes a plurality of channels, and wherein the cooperation data includes a channel number that identifies a selected one of the plurality of channels.

6. The circuit of claim 1 wherein the cooperation data includes at least one of, a master/slave indicator, a signal strength indicator, an antenna status indicator and a transmit power level indicator.

7. The circuit of claim 1 wherein the cooperation data includes at least one of, a current hop frequency, a future hop frequency, a slot hop time, and a frequency hop sequence.

8. The circuit of claim 1 wherein the cooperation data includes a voice activity detection status indicator.

9. The circuit of claim 1 wherein the cooperation data includes a transmit timing parameter.

10. The circuit of claim 1 wherein the cooperation data includes a delivery traffic indication message interval indicator.

11. The circuit of claim 1 wherein the cooperation data includes a station idle mode indicator.

12. A method comprising:

communicating packetized data to a first external device in a common frequency spectrum via a first wireless interface circuit in accordance with a first wireless communication protocol;

communicating packetized data to a second external device in the common frequency spectrum via a second wireless interface circuit in accordance with a second wireless communication protocol; and

communicating cooperation data between the first wireless interface circuit and the second wireless interface circuit via a parallel data bus, wherein the cooperation data is used by the first wireless interface circuit and the second wireless interface circuit to limit interference between the packetized data communicated in accordance with the first wireless communication protocol and the packetized data communicated in accordance with the second wireless communication protocol in the common frequency spectrum, wherein the cooperation data includes intra-device status messages between the first wireless interface circuit and the second wireless interface circuit that indicate when transmission of the packetized data is currently in progress and when reception of the packetized data is currently in progress by a selected one of: the first wireless interface circuit and the second wireless interface circuit in accordance with one of: the first wireless communication protocol; and the second wireless communication protocol in the common frequency spectrum.

13. The method of claim 12 wherein the step of communicating cooperation data between the first wireless interface circuit and the second wireless interface circuit includes communicating cooperation data for each transceived packet of the first wireless interface circuit.

14. The method of claim 12 wherein the parallel data bus is a high speed data bus for parallel communication of the intra-device status messages between the first wireless interface circuit and the second wireless interface circuit.

15. The method of claim 12 wherein the second wireless interface circuit operates in accordance with a wireless local area network protocol that includes a plurality of channels, and wherein the cooperation data includes a channel number that identifies a selected one of the plurality of channels.

16. The method of claim 12 wherein the cooperation data includes at least one of, a master/slave indicator, a signal strength indicator, an antenna status indicator and a transmit power level indicator.

17. The method of claim 12 wherein the cooperation data includes at least one of, a current hop frequency, a future hop frequency, a slot hop time, and a frequency hop sequence.

18. The method of claim 12 wherein the cooperation data includes a voice activity detection status indicator.

19. The method of claim 12 wherein the cooperation data includes a transmit timing parameter.

20. The method of claim 12 wherein the cooperation data includes a delivery traffic indication message interval indicator.

21. The method of claim 12 wherein the cooperation data includes a station idle mode indicator.

Assignments (7)
CORRECTIVE ASSIGNMENT TO CORRECT THE ERROR IN RECORDING THE MERGER IN THE INCORRECT US PATENT NO. 8,876,094 PREVIOUSLY RECORDED ON REEL 047351 FRAME 0384. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER. Recorded Mar 8, 2019
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 049248/0558 →
CORRECTIVE ASSIGNMENT TO CORRECT THE EFFECTIVE DATE OF THE MERGER PREVIOUSLY RECORDED AT REEL: 047230 FRAME: 0910. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER. Recorded Oct 29, 2018
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 047351/0384 →
MERGER Recorded Oct 4, 2018
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 047230/0910 →
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENTS Recorded Feb 3, 2017
From: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
To: BROADCOM CORPORATION
Reel/Frame 041712/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 1, 2017
From: BROADCOM CORPORATION
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 041706/0001 →
PATENT SECURITY AGREEMENT Recorded Feb 11, 2016
From: BROADCOM CORPORATION
To: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
Reel/Frame 037806/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 15, 2007
From: DESAI, PRASANNA; GONIKBERG, MARK; IBRAHIM, BRIMA B.; FRANK, EDWARD H.
To: BROADCOM CORPORATION
Reel/Frame 019436/0480 →
Continuity (1)
Related Publication 20080279264A1 · Nov 13, 2008