IP Library Granted Patent US 8,811,031
Granted Patent B2
US 8,811,031 · App. 12/852,696 · Granted Aug 19, 2014

Multichip module and method for manufacturing the same

Inventors: Masateru Koide (Kawasaki, JP); Daisuke Mizutani (Kawasaki, JP)
Assignee: Fujitsu Limited
H01L23/147H01L2224/73253H01L2224/73204H01L2224/16227H01L2924/15311H01L2924/10253H01L25/0655H01L23/49822H01L23/49827H01L23/373H01L2924/15192H01L23/49838H01L2924/09701
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Quick Facts
Patent No.
US 8,811,031
App. No.
12/852,696
Granted
Aug 19, 2014
Kind
B2
Abstract

A multichip module comprising: a base substrate; a wiring board disposed on the base substrate and having a wiring pattern; an adhesive layer configured to bond the base substrate to the wiring board while maintaining an electrical connection between the base substrate and the wiring board; and a plurality of chips connected to a surface of the wiring board, the surface being opposite the adhesive layer, wherein, assuming that α is a coefficient of thermal expansion of the wiring board, β is a coefficient of thermal expansion of the base substrate, and γ is a coefficient of thermal expansion of the adhesive layer, the relationship α<γ<β is satisfied.

Claims (20)

1. A multichip module comprising:

a base substrate including a core substrate having wiring layers on each of a top surface and a bottom surface;

a wiring board disposed on the base substrate and having a wiring pattern;

an adhesive sheet comprising an adhesive sheet main body with a plurality of holes and conductive resin, each of the plurality of holes being filled with the conductive resin so that the conductive resin within the each of the plurality of holes performs as a via, wherein the adhesive sheet is configured to bond the base substrate to the wiring board while maintaining an electrical connection between the base substrate and the wiring board; and

a plurality of chips connected to a surface of the wiring board, the surface being opposite the adhesive sheet,

wherein, assuming that α is a coefficient of thermal expansion of the wiring board, β is a coefficient of thermal expansion of the base substrate, and γ is a coefficient of thermal expansion of the adhesive sheet main body, the relationship α≦γ≦β is satisfied.

2. The multichip module according to claim 1 , wherein the adhesive sheet is in surface-contact with the base substrate and the wiring board.

3. The multichip module according to claim 1 , wherein the conductive resin is embedded in at least part of the adhesive sheet to maintain the electrical connection between the base substrate and the wiring board.

4. The multichip module according to claim 2 , wherein the conductive resin is embedded in at least part of the adhesive sheet to maintain the electrical connection between the base substrate and the wiring board.

5. The multichip module according to claim 1 , wherein the wiring board includes a silicon substrate and an insulating layer in which the wiring pattern is formed.

6. The multichip module according to claim 4 , wherein the base substrate is an organic package substrate.

7. The multichip module according to claim 1 , wherein the plurality of vias comprise laser-formed vias.

8. The multichip module according to claim 1 , wherein the wiring board comprises a central connection region for interconnecting all of the plurality of chips.

9. The multichip module according to claim 1 , wherein the wiring board comprises a peripheral connection region for connecting the plurality of chips to the base substrate.

10. A multichip module comprising:

a base substrate including a core substrate having wiring layers on each of a top surface and a bottom surface;

a wiring board disposed on the base substrate, the wiring board including a silicon substrate and an insulating layer having a wiring pattern;

an adhesive sheet comprising an adhesive sheet main body with a plurality of holes and conductive resin, each of the plurality of holes being filled with the conductive resin so that the conductive resin within the each of the plurality of holes performs as a via and configured to bond the base substrate to the wiring board while maintaining an electrical connection between the base substrate and the wiring board; and

a plurality of chips connected to a surface of the wiring board, the surface being opposite the adhesive sheet,

wherein, assuming that α is a coefficient of thermal expansion of the wiring board, β is a coefficient of thermal expansion of the base substrate, and γ is a coefficient of thermal expansion of the adhesive sheet main body, the relationship α≦γ≦β is satisfied.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 9, 2010
From: KOIDE, MASATERU; MIZUTANI, DAISUKE
To: FUJITSU LIMITED
Reel/Frame 024811/0339 →
Priority Claims (1)
JP 2009-191283 · Aug 20, 2009 · national
Continuity (1)
Related Publication 20110044015A1 · Feb 24, 2011