Semiconductor device comprising a capacitor and an electrical connection via and fabrication method

1. A semiconductor device, comprising:

a semiconductor wafer having a front face;

a dielectric layer on the front face of the semiconductor wafer, said dielectric layer including a front electrical connection comprising an electrical connection portion embedded within the dielectric layer at a position offset from and parallel to said front face;

a blind hole formed in a rear face of the semiconductor wafer and having a depth passing completely through the semiconductor wafer and partially through the dielectric layer to reveal a rear face of the electrical connection portion;

a capacitor formed in the blind hole, comprising:

a first conductive layer covering a lateral wall of the blind hole and at least a portion of the rear face of the electrical connection portion and forming an outer electrode of the capacitor,

a dielectric intermediate layer covering said first conductive layer and forming a dielectric membrane, and

a second conductive layer covering the dielectric intermediate layer and forming an inner electrode of the capacitor, and

a rear electrical connection for the inner electrode.

2. The device according to claim 1 , comprising an electrical circuit formed on the front face of the semiconductor wafer and electrically linked to said electrical connection portion.

3. The device according to claim 1 , comprising an electrical connection via passing through said wafer.

4. The device according to claim 3 , comprising an electrical connection between the inner electrode of the capacitor and said electrical connection via.

5. The device according to claim 1 , comprising an external electrical connection linking to an electronic device said electrical connection portion which is linked to the outer electrode of the capacitor.

6. The device according to claim 1 , comprising an external electrical connection linking an electronic device to the inner electrode of the capacitor.

7. A method for fabricating a semiconductor device comprising:

forming on a front face of a semiconductor wafer a dielectric layer including a front electrical connection comprising an electrical connection portion embedded within the dielectric layer at a position offset from and parallel to said front face;

producing a blind hole through a rear face of the semiconductor wafer and having a depth passing completely through the semiconductor wafer and partially through the dielectric layer to reveal a rear face of said electrical connection portion;

forming, in succession, in the blind hole, a first conductive layer portion forming an outer electrode of a capacitor linked to the rear face of said electrical connection portion, a dielectric layer forming a dielectric membrane of the capacitor and a second conductive layer portion forming an inner electrode of the capacitor; and

producing a rear electrical connection for the inner electrode.

8. The method according to claim 7 , comprising: producing an electrical connection between said electrical connection portion and an integrated circuit of said semiconductor wafer.

9. The method according to claim 7 , comprising: producing a front external electrical connection to said electrical connection portion.

10. The method according to claim 7 , comprising: producing a rear external electrical connection to the inner electrode.

11. A method for fabricating a semiconductor device comprising:

forming on a front face of a semiconductor wafer a dielectric layer including a front electrical connection comprising first and second electrical connection portions embedded within the dielectric layer at a position offset from and parallel to said front face;

producing a first blind hole and a second blind hole through a rear face of the semiconductor wafer and each having a depth passing completely through the semiconductor wafer and partially through the dielectric layer to reveal a rear face of said first and second electrical connection portions, respectively;

depositing a first conductive layer and removing a part of this conductive layer so as to form a first conductive portion in the first blind hole and a second conductive portion in the second blind hole;

depositing a dielectric layer and removing a part of this dielectric layer so as to form a dielectric membrane on the first conductive portion in the first blind hole; and

depositing a second conductive layer on the dielectric membrane in the first blind hole and on the second conductive portion in the second blind hole;

wherein the first conductive portion, the dielectric membrane and the second conductive layer form, in the first blind hole, an outer electrode, a dielectric membrane and an inner electrode, respectively, of a capacitor; and

wherein the second conductive portion and the second conductive layer form, in the second blind hole, an electrical connection via.

12. The method according to claim 11 , further comprising cropping the second conductive layer so as to isolate the inner electrode of said capacitor from the electrical connection via.

13. The method according to claim 11 , comprising: producing an electrical connection between said first and second electrical connection portions and one or more integrated circuits of said semiconductor wafer.

14. The method according to claim 11 , comprising: producing a front external electrical connection to at least one of said electrical connection portions.

15. The method according to claim 11 , comprising: producing a rear external electrical connection to the inner electrode.

16. The method according to claim 11 , comprising: producing a rear external electrical connection between the inner electrode and the electrical connection via.

17. The device according to claim 1 , further comprising an insulating layer in the blind hole between the first conductive layer and the semiconductor wafer.