IP Library Granted Patent US 8,853,559
Granted Patent B2
US 8,853,559 · App. 13/388,450 · Granted Oct 7, 2014

Insulation circuit board, and power semiconductor device or inverter module using the same

Inventors: Hironori Matsumoto (Hitachi, JP); Jumpei Kusukawa (Hitachinaka, JP)
Assignee: Hitachi, Ltd.
H05K1/056H01L2924/09701H01L2924/12044H01L23/62H01L25/18H05K2201/09781H05K1/0256H01L23/647H01L23/142H05K2201/10022H01L25/072H01L23/49844H05K2201/0761H05K2201/0209H05K1/0262
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Quick Facts
Patent No.
US 8,853,559
App. No.
13/388,450
Granted
Oct 7, 2014
Kind
B2
Abstract

The invention relates to a high-voltage insulation circuit board which is used in an electric power apparatus such as an electric power converter or the like such as power semiconductor device, inverter module, or the like and provides an insulation circuit board in which electric field concentration at the end sections of a wiring pattern is reduced, partial discharging is suppressed, and a reliability is high. According to the invention, there is provided an insulation circuit board having: a metal base substrate; and wiring patterns which are formed onto at least one of the surfaces of the metal base substrate through an insulation layer, characterized in that between two adjacent wiring patterns in which an electric potential difference exists among the wiring patterns, at least one or more wiring patterns or conductors which are in contact with the insulation layer and have an electric potential in a range of the electric potential difference between the adjacent wiring patterns are arranged. According to the invention, the electric field concentration at the end sections of the wiring pattern to which a high voltage is applied is reduced and partial-discharge-resistant characteristics are improved.

Claims (32)

1. An insulation circuit board comprising:

a metal base substrate;

an insulation layer;

a first wiring pattern which is formed onto at least one surface of the metal base substrate through the insulation layer;

a second wiring pattern which is formed onto at least one surface of the metal base substrate through the insulation layer, and

a third wiring pattern which is in contact with the insulation layer, at least a portion of the third wiring pattern located between the first wiring pattern and the second wiring pattern where the distance between the first wiring pattern and second wiring pattern is closest, and the third wiring pattern configured not to be coupled to an electric ground potential and configured to divide a voltage between the first wiring pattern and the second wiring pattern,

wherein an electric potential difference exists between the first wiring pattern and the second wiring pattern, and

wherein the third wiring pattern has an electric potential in a range of the electric potential difference between the first wiring pattern and the second wiring pattern.

2. The insulation circuit board according to claim 1 , characterized in that

the insulation layer which is in contact with the metal base substrate and the first wiring pattern, second wiring pattern and third wiring pattern comprises at least one selected from the group consisting of a resin mainly consisting of an epoxy resin, a resin mainly consisting of a polyimide resin, a resin mainly consisting of a silicone resin, a resin mainly consisting of an acrylic resin, a resin mainly consisting of an urethane resin and a resin consisting of a denatured material or mixture of those resins.

3. The insulation circuit board according to claim 2 , characterized in that

the insulation layer comprises at least one selected from the group consisting of Al 2 O 3 (alumina), SiO 2 (silica), AlN (aluminum nitride), BN (boron nitride), ZnO (zinc oxide), SiC (silicon carbide), Si 3 N 4 (silicon nitride), MgO (magnesium oxide), and a filler adapted to improve heat radiation performance and insulation performance in a manner similar to those compounds.

4. The insulation circuit board according to claim 1 , characterized in that

the insulation layer which is in contact with the metal base substrate and the first wiring pattern, second wiring pattern and third wiring pattern comprises at least one selected from the group consisting of a ceramic material mainly consisting of Al 2 O 3 (alumina), ZrO 2 (zirconia), AlN (aluminum nitride), or BN (boron nitride), a ceramic material which has characteristics similar to those of the ceramic materials, whose fundamental component consists of a metal oxide, and which is burned and solidified by a heat treatment of a high temperature, and an inorganic material consisting of a denatured material or mixture obtained by mixing a glass component into a ceramic material.

5. The insulation circuit board according to claim 1 , characterized in that

in order to provide the electric potential in the range of the potential difference between the first wiring pattern and the second wiring pattern, a resistor is arranged between the first wiring pattern and the second wiring pattern where the electric potential difference exists.

6. A power semiconductor device or inverter module characterized in that one of the insulation circuit boards according to claim 1 is used, circuit parts including semiconductor elements connected to the first wiring pattern and second wiring pattern are mounted, and the first wiring pattern, second wiring pattern and third wiring pattern are arranged.

7. The insulation circuit board according to claim 1 , wherein the electric potential difference between the first wiring pattern and the second wiring pattern is less than or equal to 350V.

8. A power semiconductor device comprising:

a metal base substrate;

an insulation layer;

a first wiring pattern which is formed onto at least one surface of the metal base substrate through the insulation layer;

a second wiring pattern which is formed onto at least one surface of the metal base substrate through the insulation layer; and

a plurality of semiconductor elements connected to the first wiring pattern and second wiring pattern; and

a third wiring pattern which is in contact with the insulation layer, at least a portion of the third wiring pattern located between the first wiring pattern and the second wiring pattern, and the third wiring pattern not connected to a semiconductor device of the plurality of semiconductor devices,

wherein an electric potential difference exists between the first wiring pattern and the second wiring pattern and the third wiring pattern has an electric potential in a range of the electric potential difference between the first wiring pattern and the second wiring pattern.

9. The power semiconductor device according to claim 8 , characterized in that

the first wiring pattern and the second wiring pattern are an input potential wiring pattern and a ground potential wiring pattern.

10. The power semiconductor device according to claim 8 , characterized in that

the first wiring pattern and the second wiring pattern are output wiring patterns of a three-phase alternating current connected to the semiconductor elements.

11. An inverter module characterized by having one power semiconductor device according to claim 8 .

12. The power semiconductor device according to claim 8 , wherein the electric potential difference between the first wiring pattern and the second wiring pattern is less than or equal to 350V.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 2, 2012
From: MATSUMOTO, HIRONORI; KUSUKAWA, JUMPEI
To: HITACHI, LTD.
Reel/Frame 027638/0482 →
Priority Claims (1)
JP 2009-225903 · Sep 30, 2009 · national
Continuity (1)
Related Publication 20120127684A1 · May 24, 2012