IP Library Granted Patent US 8,863,377
Granted Patent B2
US 8,863,377 · App. 13/094,991 · Granted Oct 21, 2014

Method for manufacturing circuit board and method for manufacturing structure using the same

Inventors: Masaaki Harazono (Yasu, JP); Takayuki Umemoto (Yasu, JP)
Assignee: Kyocera Corporation
H05K3/4644H05K2201/0195H05K2201/09536H05K2201/0959H05K2203/0307
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Quick Facts
Patent No.
US 8,863,377
App. No.
13/094,991
Granted
Oct 21, 2014
Kind
B2
Abstract

According to one embodiment of the invention, a method for manufacturing a circuit board comprises covering with a metal layer a surface of a first resin layer including polyimide resin; forming a plurality of conductive layers arranged on the metal layer with the conductive layers apart from each other in a planer view; roughening surfaces of the conductive layers with an alkaline aqueous solution; and etching a part of the metal layer between the conductive layers in the planer view to expose the surface of the first resin layer after roughening the surfaces of the conductive layers.

Claims (24)

1. A method for manufacturing a circuit board comprising:

covering a surface of a first resin layer including polyimide resin with a metal layer;

forming a plurality of conductive layers arranged apart from each other in a planer view on the metal layer;

roughening surfaces of the conductive layers with an alkaline aqueous solution; and

etching a part of the metal layer between the conductive layers in the planer view to expose the surface of the first resin layer after roughening the surfaces of the conductive layers.

2. The method for manufacturing the circuit board according to claim 1 , wherein

covering the surface of the first resin layer with the metal layer comprises:

forming the metal layer by sputtering or evaporating.

3. The method for manufacturing the circuit board according to claim 2 , wherein

each of the conductive layers has a first layer and a second layer on the first layer, and

forming the conductive layers comprises:

covering a surface of the metal layer with the first layer by sputtering or evaporating;

forming a plurality of second layers arranged apart from each other in the planer view on the first layer by electroplating; and

etching a part of the first layer exposed between the second layers in the planer view.

4. The method for manufacturing the circuit board according to claim 1 , wherein

etching the part of the metal layer comprises:

etching the metal layer without etching the conductive layers.

5. The method for manufacturing circuit board according to claim 1 , comprising:

forming a second resin layer which is in a direct contact with the exposed surface of the first resin layer.

6. The method for manufacturing the circuit board according to claim 1 , wherein

the metal layer includes titanium, molybdenum, chrome, or nickel chrome alloy, and

the conductive layers include copper.

7. A method for manufacturing a structure comprising:

connecting an electronic component electrically to a circuit board manufactured by the method according to claim 1 .

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 12, 2011
From: HARAZONO, MASAAKI; UMEMOTO, TAKAYUKI
To: KYOCERA CORPORATION
Reel/Frame 026886/0969 →
Priority Claims (2)
JP 2010-102394 · Apr 27, 2010 · national
JP 2011-099208 · Apr 27, 2011 · national
Continuity (1)
Related Publication 20110314666A1 · Dec 29, 2011