Restricted access memory device providing short range communication-based security features and related methods
A memory device may include a memory, a host interface connector, a short range communication transceiver, and a processor coupled with the memory and the short range communication transceiver. The processor may be capable of storing data in the memory, and reading the data from the memory to the host device via the host interface connector based upon at least one of receiving first authentication data including a password, via the host interface connector, from a memory access application installed on the host device, or receiving second authentication data via the short range communication transceiver without use of the memory access application.
1. A restricted access memory device including:
a memory;
a host interface connector;
a short range communication transceiver; and
a processor coupled with the memory and the short range communication transceiver and capable of
storing data in the memory,
determining if a memory access application is installed on a host device via the host interface connector,
when the memory access application is installed on the host device, reading the data from the memory to the host device via the host interface connector when first authentication data including a password is received, via the host interface connector, from the memory access application, and
when the memory access application is not installed on the host device, causing the memory access application to be installed on the host device based upon receiving a user-initiated installation instruction, and otherwise reading the data from the memory to the host device via the host interface connector when second authentication data is received via the short range communication transceiver without use of the memory access application and the first authentication data.
2. The memory device of claim 1 wherein the processor includes a cryptographic processor that is further capable of encrypting the data stored in the memory.
3. The memory device of Claim 1 wherein the host interface connector includes a universal serial bus (USB) connector.
4. The memory device of Claim 1 wherein the memory includes a flash memory.
5. The memory device of claim 1 wherein the short range communication transceiver comprises a near field communication (NFC) transceiver.
6. The memory device of claim 1 wherein the second authentication data includes a password.
7. The memory device of claim 1 wherein the second authentication data includes challenge-response data.
8. The memory device of claim 1 further including a thumb drive housing carrying the memory, the host interface connector, the short range communication transceiver, and the processor.
9. An electronics system including:
a host device capable of having a memory access application installed thereon;
a restricted access memory device including
a memory,
a host interface connector,
a short range communication transceiver, and
a processor coupled with the memory and the short range communication transceiver and capable of
storing data in the memory,
determining if the memory access application is installed on the host device via the host interface connector,
when the memory access application is installed on the host device, reading the data from the memory to the host device via the host interface connector when first authentication data including a password is received, via the host interface connector, from the memory access application, and
when the memory access application is not installed on the host device,
causing the memory access application to be installed on the host device based upon receiving a user-initiated installation instruction, and otherwise reading the data from the memory to the host device via the host interface connector when second authentication data is received via the short range communication transceiver without use of the memory access application and the first authentication data.
10. The electronics system of claim 9
wherein the processor includes a cryptographic processor that is further capable of encrypting the data stored in the memory.
11. The electronics system of claim 9 wherein the host interface connector includes a universal serial bus (USE) connector.
12. The electronics system of claim 9 wherein the memory includes a flash memory.
13. The electronics system of claim 9 wherein the short range communication transceiver comprises a near field communication (NFC) transceiver.
14. The electronics system of claim 9 wherein the second authentication data includes a password.
15. The electronics system of claim 9 wherein the second authentication data includes challenge-response data.
16. The electronics system of claim 9 wherein the memory device further includes a thumb drive housing carrying the memory, the host interface connector, the short range communication transceiver, and the processor.
17. A method for a restricted access memory device including a memory, a host interface connector, and a short range communication transceiver, the method including:
storing data in the memory;
determining if a memory access application is installed on a host device via the host interface connector,
when the memory access application is installed on the host device, reading the data from the memory to a host device via the host interface connector when first authentication data including a password is received, via the host interface connector, from a the memory access application; and
when the memory access application is not installed on the host device, causing the memory access application to be installed on the host device based upon receiving a user-initiated installation instruction, and otherwise reading the data from the memory to a host device via the host interface connector when second authentication data is received via the short range communication transceiver without use of the memory access application and the first authentication data.
18. The method of claim 17 further including encrypting the data to be stored in the memory at the memory device.
19. The method of claim 17 wherein the second authentication data includes at least one of a password or challenge-response data.
20. A non-transitory computer-readable medium for a restricted access memory device including a memory, a host interface connector, and a short range communication transceiver, the non-transitory computer-readable medium having computer executable instructions for causing the memory device to perform steps including:
storing data in the memory;
determining if a memory access application is installed on a host device via the host interface connector,
when the memory access application is installed on the host device, reading the data from the memory to a host device via the host interface connector when first authentication data including a password is received, via the host interface connector, from the memory access application; and
when the memory access application is not installed on the host device, causing the memory access application to be installed on the host device based upon receiving a user-initiated installation instruction, and otherwise reading the data from the memory to a host device via the host interface connector when second authentication data is received via the short range communication transceiver without use of the memory access application.
21. The non-transitory computer-readable medium of claim 20 further having computer-executable instructions for causing the memory device to perform a step of encrypting the data to be stored in the memory.
22. The non-transitory computer-readable medium of claim 20 wherein the second authentication data includes at least one of a password and challenge-response data.