Wireless communicating among vertically arranged integrated circuits (ICs) in a semiconductor package
Methods and apparatus are disclosed for wirelessly communicating among integrated circuits and/or functional modules within the integrated circuits. A semiconductor device fabrication operation uses a predetermined sequence of photographic and/or chemical processing steps to form one or more functional modules onto a semiconductor substrate. The functional modules are coupled to an integrated waveguide that is formed onto the semiconductor substrate and/or attached thereto to form an integrated circuit. The functional modules communicate with each other as well as to other integrated circuits using a multiple access transmission scheme via the integrated waveguide. One or more integrated circuits may be coupled to an integrated circuit carrier to form Multichip Module. The Multichip Module may be coupled to a semiconductor package to form a packaged integrated circuit.
1. An integrated circuit, comprising:
a first group of functional modules formed onto a first arrangement of useable fabrication layers;
a second group of functional modules formed onto a second arrangement of useable fabrication layers, the first arrangement of useable fabrication layers being coupled to the second arrangement of useable fabrication layers to form a vertical arrangement; and
a conductive element, coupled to the first and the second arrangements of useable fabrication layers,
wherein the integrated circuit is configured and arranged to be displaced from a second integrated circuit having a second conductive element such that the conductive element and the second conductive element are configured and arranged to form an integrated waveguide.
2. The integrated circuit of claim 1 , wherein the first and the second arrangements of useable fabrication layers comprise:
a diffusion and a polysilicon layer to form components of the functional module; and
a conductive layer to form interconnections between the components.
3. The integrated circuit of claim 1 , wherein the first arrangement of useable fabrication layers is interdigitated with a plurality of insulation layers, and
wherein an insulation layer from among the plurality of insulation layers is coupled to a useable fabrication layer from among the second arrangement of useable fabrication layers to form the vertical arrangement.
4. The integrated circuit of claim 1 , wherein the first and the second arrangements of useable fabrication layers are coupled together using a physical connection.
5. The integrated circuit of claim 1 , wherein a first portion of the conductive element is formed within the first arrangement of useable fabrication layers and a second portion of the conductive element is formed within the first arrangement of useable fabrication layers, the first portion being coupled to the second portion to form the first conductive element.
6. An integrated circuit, comprising:
a first group of functional modules formed onto a first arrangement of useable fabrication layers of a first semiconductor substrate;
a second group of functional modules formed onto a second arrangement of useable fabrication layers of a second semiconductor substrate, the first arrangement of useable fabrication layers being coupled to the second arrangement of useable fabrication layers to form a vertical arrangement; and
an integrated waveguide, coupled to the vertical arrangement, configured to communicatively couple the first and the second groups of functional modules.
7. The integrated circuit of claim 6 , wherein the integrated waveguide comprises:
a first conductive element formed onto a first useable fabrication layer from among a third arrangement of useable fabrication layers of a third semiconductor substrate; and
a second conductive element formed onto a second useable fabrication layer from among the third arrangement of useable fabrication layers.
8. The integrated circuit of claim 7 , wherein the first and the second conductive elements are configured and arranged to form a first parallel plate and a second parallel plate, respectively, and
wherein the first parallel plate and the second parallel plate elements are configured and arranged to form a parallel plate waveguide.
9. The integrated circuit of claim 8 , wherein the first conductive element comprises:
a plurality of phase openings.
10. The integrated circuit of claim 9 , wherein the plurality of phase openings are configurable to be opened or closed to dynamically configure operating characteristics of the integrated waveguide.
11. The integrated circuit of claim 10 , wherein the first group of functional modules comprises:
a waveguide controller module configured to control whether each of the plurality of phase openings are to be opened or closed.
12. The integrated circuit of claim 7 , wherein the first and the second conductive elements are characterized as being separated by a cavity region.
13. The integrated circuit of claim 7 , wherein the cavity region is a region between the first conductive element and the second conductive element that is free of conductive material.