Input/output sense amplifier

1. An input/output sense amplifier comprising:

a data input unit configured to amplify data through inverters and to output the amplified data; and

a latch unit configured to receive the amplified data and configured to latch and output an output signal of the data input unit to an output terminal,

wherein the data input unit comprises:

a first inverter configured to amplify the data, which is inputted through a first local transmission line, using a driving voltage, and to output the amplified data;

a second inverter configured to amplify the data, which is inputted through a second local transmission line, using the driving voltage, and to output the amplified data; and

a sink unit connected to the first and second buffer units and configured to allow current to flow toward a ground voltage in response to the strobe signal,

wherein the first inverter comprises;

a first PMOS transistor connected to a driving voltage terminal; and

first NMOS transistor connected between the first PMOS transistor and the sink unit,

wherein the first PMOS transistor and the first NMOS transistor are driven in response to the data and a connecting node between the first PMOS transistor and the first NMOS transistor is connected to the latch unit.

2. The input/output sense amplifier according to claim 1 , further comprising a precharge unit configured to supply a precharge voltage to the output terminal in response to a strobe signal.

3. The input/output sense amplifier according to claim 1 , wherein the sink unit comprises an NMOS transistor.

4. The input/output sense amplifier according to claim 3 , wherein the sink unit receives the strobe signal.

5. The input/output sense amplifier according to claim 1 , wherein the second inverter comprises:

a second PMOS transistor connected to a driving voltage terminal; and

a second NMOS transistor connected between the second PMOS transistor and the sink unit,

wherein the second PMOS transistor and the second NMOS transistor are driven in response to the data and a connecting node between the second PMOS transistor and the second NMOS transistor is connected to the latch unit.

6. An input/output sense amplifier comprising:

a data input unit configured to amplify data using a driving voltage and to output the amplified data to first and second nodes; and

a latch unit connected to the first and second nodes and configured to latch and output an output signal of the data input unit to an output terminal,

wherein the data input unit comprises:

a first inverter configured to amplify the data, which is inputted through a first local transmission line, using the driving voltage, and to output the amplified data to the first node; and

a second inverter configured to amplify the data, which is inputted through a second local transmission line, using the driving voltage, and to output the amplified data to the second node,

wherein the first inverter comprises:

a first PMOS transistor connected between the driving voltage and the first node and configured to receive the data; and

a first NMOS transistor connected between the first node and the sink unit, and configured to receive the data.

7. The input/output sense amplifier according to claim 6 , further comprising a precharge unit configured to supply a precharge voltage to the output terminal in response to a strobe signal.

8. The input/output sense amplifier according to claim 7 , wherein the data input unit further comprises:

a sink unit connected to the first and second inverters and configured to allow current to flow toward a ground voltage in response to the strobe signal.

9. The input/output sense amplifier according to claim 6 , wherein the second inverter comprises:

a second PMOS transistor connected between the driving voltage and the second node, and configured to receive the data; and

a second NMOS transistor connected between the second node and the sink unit, and configured to receive the data.

10. The input/output sense amplifier according to claim 8 , wherein the sink unit comprises an NMOS transistor.

11. The input/output sense amplifier according to claim 10 , wherein the sink unit receives the strobe signal.

12. An input/output sense amplifier comprising:

a data input unit connected between a driving voltage and a ground voltage and configured to amplify data using the driving voltage and to output the amplified data; and

a latch unit configured to receive the amplified data at their source terminal and configured to latch and output the amplified data to an output terminal,

wherein the data input unit is configured to output the amplified data to first and second nodes which are connected to the source terminal of the latch unit, and

wherein the data input unit comprises:

a first buffer unit including a first PMOS transistor connected between the driving voltage and the first node, and configured to receive the data, and a first NMOS transistor connected to the first node, and configured to receive the data, and

a second buffer unit including a second PMOS transistor connected between the driving voltage and the second node, and configured to receive the data, and a second NMOS transistor connected to the second node, and configured to receive the data.

13. The input/output sense amplifier according to claim 12 , wherein the data input unit further comprises:

a sink unit connected between a third node and the ground voltage and configured to allow current to flow toward the ground voltage in response to the strobe signal,

wherein the third node is a node for connecting a source of the first NMOS transistor with a source of the second NMOS transistor.

14. The input/output sense amplifier according to claim 13 , wherein the sink unit comprises an NMOS transistor.

15. The input/output sense amplifier according to claim 14 , wherein the sink unit receives the strobe signal.