IP Library Granted Patent US 8,890,622
Granted Patent B2
US 8,890,622 · App. 13/908,140 · Granted Nov 18, 2014

Cascode amplifier

Inventors: Miyo Miyashita (Tokyo, JP); Kazuya Yamamoto (Tokyo, JP); Fumimasa Kitabayashi (Tokyo, JP); Suguru Maki (Tokyo, JP); Eri Fukuda (Tokyo, JP); Katsuya Kato (Tokyo, JP)
Assignee: Mitsubishi Electric Corporation
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Quick Facts
Patent No.
US 8,890,622
App. No.
13/908,140
Granted
Nov 18, 2014
Kind
B2
Abstract

A cascode amplifier includes: first transistors; second transistors cascode-connected with respective first transistors; a first line connected at spaced points to control terminals of the first transistors; a second line connected at spaced points to control terminals of the second transistors; and a capacitance connected between one end of the second line and ground. The second line includes at least two lines connected in parallel with each other.

Claims (24)

1. A cascode amplifier comprising:

a plurality of first transistors;

a plurality of second transistors cascode-connected with the plurality of first transistors, respectively;

a first line, having a length and connected, at spaced points along its length, to control terminals of the plurality of first transistors;

a second line having a length and connected, at spaced points along its length, to control terminals of the plurality of second transistors; and

a capacitance connected between an end of the second line and ground, wherein the second line includes at least two lines connected in parallel with each other.

2. The cascode amplifier according to claim 1 , wherein the first line includes at least two lines connected in parallel with each other.

3. The cascode amplifier according to claim 1 , wherein the plurality of first transistors and the plurality of second transistors are n-channel MOS transistors.

4. A cascode amplifier comprising:

a plurality of first transistors;

a plurality of second transistors cascode-connected with the plurality of first transistors, respectively;

a first line having a length and connected, at spaced points along its length, to control terminals of the plurality of first transistors;

a second line having a length and connected, at spaced points along its length, to control terminals of the plurality of second transistors;

a first capacitance connected between a first end of the second line and ground; and

a second capacitance connected between a second end of the second line and ground.

5. The cascode amplifier according to claim 4 , wherein the plurality of first transistors and the plurality of second transistors are n-channel MOS transistors.

6. A cascode amplifier comprising:

a plurality of first transistors;

a plurality of second transistors cascode-connected with the plurality of first transistors, respectively;

a first line having a length and connected, at spaced points along its length, to control terminals of the plurality of first transistors;

a second line having a length and connected, at spaced points along its length, to control terminals of the plurality of second transistors; and

a plurality of capacitances connected at a first end to the control terminals of the plurality of second transistors and connected at a second end to ground.

7. The cascode amplifier according to claim 6 , wherein the cascode amplifier is a differential amplifier.

8. The cascode amplifier according to claim 6 , wherein the plurality of first transistors and the plurality of second transistors are n-channel MOS transistors.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 21, 2019
From: MITSUBISHI ELECTRIC CORPORATION
To: MURATA MANUFACTURING CO., LTD.
Reel/Frame 048072/0626 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 4, 2013
From: MIYASHITA, MIYO; YAMAMOTO, KAZUYA; KITABAYASHI, FUMIMASA; MAKI, SUGURU; FUKUDA, ERI; KATO, KATSUYA
To: MITSUBISHI ELECTRIC CORPORATION
Reel/Frame 030539/0346 →
Priority Claims (1)
JP 2012-247144 · Nov 9, 2012 · national
Continuity (1)
Related Publication 20140132358A1 · May 15, 2014