IP Library Granted Patent US 8,896,471
Granted Patent B1
US 8,896,471 · App. 13/647,301 · Granted Nov 25, 2014

Conversion of a discrete-time quantized signal into a continuous-time, continuously variable signal

Inventor: Christopher Pagnanelli (Huntington Beach, CA)
Assignee: Syntropy Systems, LLC
H03M3/30H03M1/747
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Quick Facts
Patent No.
US 8,896,471
App. No.
13/647,301
Granted
Nov 25, 2014
Kind
B1
Abstract

Provided are, among other things, systems, apparatuses, methods and techniques for converting a discrete-time quantized signal into a continuous-time, continuously variable signal. An exemplary converter preferably includes: (1) multiple oversampling converters, each processing a different frequency band, operated in parallel; (2) multirate (i.e., polyphase) delta-sigma modulators (preferably second-order or higher); (3) multi-bit quantizers; (4) multi-bit-to-variable-level signal converters, such as resistor ladder networks or current source networks; (5) adaptive nonlinear, bit-mapping to compensate for mismatches in the multi-bit-to-variable-level signal converters (e.g., by mimicking such mismatches and then shifting the resulting noise to a frequently range where it will be filtered out by a corresponding bandpass (reconstruction) filter); (6) multi-band (e.g., programmable noise-transfer-function response) bandpass delta-sigma modulators; and/or (7) a digital pre-distortion linearizer (DPL) for canceling noise and distortion introduced by an analog signal bandpass (reconstruction) filter bank.

Claims (22)

1. An apparatus for converting a discrete-time quantized signal into a continuous-time, continuously variable signal, comprising:

an input line for accepting an input signal that is discrete in time and in value;

a digital pre-distortion linearizing filter having an input coupled to the input line and Igin an output;

a plurality of processing branches coupled to the output of the digital pre-distortion linearizing filter, each of said processing branches including: (a) a quantization circuit, (b) a multi-bit-to-variable-level signal converter coupled to an output of the quantization circuit, and (c) an analog bandpass filter coupled to an output of the multi-bit-to-continuously-variable signal converter; and

an adder coupled to an output of the analog bandpass filter in each of the processing branches,

wherein the analog bandpass filters in different ones of said processing branches select different frequency bands, and

wherein the digital pre-distortion linearizing filter has a transfer function that produces an at least approximately all-pass response when convolved with a composite transfer function that represents the combined transfer functions of the analog bandpass filters in the processing branches.

2. An apparatus according to claim 1 , where the digital pre-distortion linearizing filter is implemented as an adaptive structure that is dynamically tuned to compensate for variations in responses of the analog bandpass filters.

3. An apparatus according to claim 1 , where the digital pre-distortion linearizing filter is dynamically tuned to account for changes in ambient temperature.

4. An apparatus according to claim 1 , where the digital pre-distortion linearizing filter is implemented as a polyphase structure and includes, for each subsampling phase, a substructure that operates at a clock rate that is a submultiple of a clock rate for the digital pre-distortion linearizing filter as a whole.

5. An apparatus according to claim 1 , where the digital pre-distortion linearizing filter includes both feedforward and feedback components.

6. An apparatus according to claim 1 , wherein the digital pre-distortion linearizing filter has an impulse response of length equal to 2 times the total number of processing branches.

7. An apparatus according to claim 1 , wherein the digital pre-distortion linearizing filter has an impulse response of length equal to 4 times the total number of processing branches.

8. An apparatus according to claim 1 , where the analog bandpass filters include at least one of a Butterworth, Chebychev, Bessel, elliptic, or coupled-resonator filter structure.

9. An apparatus according to claim 1 , wherein at least one of the analog bandpass filters within the plurality of processing branches is different from another of the analog bandpass filters with respect in at least one of center frequency, bandwidth, order, or frequency response.

10. An apparatus according to claim 1 , wherein at least one analog bandpass filter within the plurality of processing branches has a frequency response that is not greater than 10th order.

11. An apparatus according to claim 1 , wherein each of a plurality of the processing branches includes at least one quadrature upconverter that increases, by a factor of at least two, a center frequency of the frequency band selected for said processing branch.

12. An apparatus according to claim 1 , wherein each of a plurality of the processing branches includes at least one quadrature downconverter that decreases, by a factor of at least two, a center frequency of the frequency band selected for said processing branch.

13. An apparatus according to claim 12 , wherein each of a plurality of the processing branches includes a downconverter and an upconverter, and wherein the downconverter includes at least one parameter that is adjusted to reduce output spurious responses by compensating for at least one of amplitude or phase imbalance of the upconverter.

14. An apparatus according to claim 13 , wherein the at least one parameter is dynamically adjusted, based on a signal-strength metric, so as to minimize a power level of spurious responses at an output of the respective processing branch.

15. An apparatus according to claim 1 , wherein the analog bandpass filter in each of the processing branches has a frequency response order that is not greater than 10.

16. An apparatus according to claim 1 , wherein the different frequency bands selected by the analog bandpass filters collectively encompass the entire frequency range of the input signal.

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 2, 2021
From: PAGNANELLI, CHRISTOPHER; SYNTROPY SYSTEMS, LLC
To: PAGNANELLI FAMILY TRUST
Reel/Frame 057998/0246 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 15, 2021
From: SYNTROPY SYSTEMS, LLC
To: PAGNANELLI, CHRISTOPHER
Reel/Frame 055928/0422 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 8, 2012
From: PAGNANELLI, CHRISTOPHER
To: SYNTROPY SYSTEMS, LLC
Reel/Frame 029092/0654 →
Continuity (6)
Continuation 13400019 · Feb 17, 2012
Continuation In Part 12970379 · Dec 16, 2010
Provisional Application 61444643 · Feb 18, 2011
Provisional Application 61450617 · Mar 8, 2011
Provisional Application 61507568 · Jul 31, 2011
Provisional Application 61287079 · Dec 16, 2009