IP Library Granted Patent US 8,935,484
Granted Patent B2
US 8,935,484 · App. 13/077,842 · Granted Jan 13, 2015

Write-absorbing buffer for non-volatile memory

Inventors: Jichuan Chang (Sunnyvale, CA); Parthasarathy Ranganathan (San Jose, CA); David Roberts (Ann Arbor, MI)
Assignee: Hewlett-Packard Development Company, L.P.
G06F12/0868G06F11/1441G06F11/2015
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Quick Facts
Patent No.
US 8,935,484
App. No.
13/077,842
Filed
Mar 31, 2011
Granted
Jan 13, 2015
Kind
B2
Art Unit
2138
USPC
711/103
Abstract

A write-absorbing, volatile memory buffer for use with a processor module and a non-volatile memory is disclosed. The write-absorbing buffer operates as a dirty cache that can be used to look up both read and write requests, although allocating new blocks only for write requests and not read requests. The blocks are small sized, and a write-only least-recently used cache replacement policy is used to transfer data in the blocks to the non-volatile memory. The write-absorbing buffer can be used to store copy-on-write pages for at least one virtual machine associated with the processor module and reduce write overhead to the non-volatile memory.

Claims (28)

1. A data storage apparatus, comprising:

a processor module;

a non-volatile memory data store storing a base page for access by two or more virtual machines; and

a write-absorbing buffer between the processor and the non-volatile memory data store to operate as a dirty first level cache that allocates new blocks only for write requests and not read requests, the write-absorbing buffer having at least one copy-on-write page associated with the base page for access by one of the two or more virtual machines.

2. The data storage apparatus of claim 1 , wherein the processor module comprises at least one processor core.

3. The data storage apparatus of claim 1 , wherein the non-volatile memory data store comprises a non-volatile memory selected from the group consisting of a Memristor and a Phase-Change Memory.

4. The data storage apparatus of claim 1 , wherein the write-absorbing buffer comprises a volatile memory.

5. The data storage apparatus of claim 1 , further comprising a Bloom filter to look-up read and write requests from the processor module to the non-volatile memory.

6. The data storage apparatus of claim 1 , further comprising a write-back buffer between the write-absorbing buffer and the non-volatile memory data store.

7. The data storage apparatus of claim 6 , further comprising a backup power to provide power to the write-absorbing buffer and the write-back buffer in case of a power failure.

8. The data storage apparatus of claim 1 , wherein the write-absorbing buffer comprises a write-only least-recently-used cache replacement policy to evict a least recently used block into the non-volatile memory data store.

9. The data storage apparatus of claim 1 , further comprising a copy-on-write table to store addresses for copy-on-write pages in the write-absorbing buffer and in the non-volatile memory data store.

10. The data storage apparatus of claim 9 , wherein the addresses comprise a base page address for the base page in the non-volatile memory and a new page address for the copy-on-write page in the write-absorbing buffer.

11. A method, comprising:

storing a copy-on-write page in a write-absorbing buffer between a processor module and a non-volatile memory, the write-absorbing buffer operating as a dirty first level cache that allocates new blocks only for write requests and not read requests;

storing a base page associated with the copy-on-write page on the non-volatile memory;

referencing the copy-on-write page in a copy-on-write table associated with the write-absorbing buffer; and

writing the copy-on-write page from the write-absorbing buffer to the non-volatile memory when at least one block from the copy-on-write page is evicted from the write-absorbing buffer.

12. The method of claim 11 , further comprising using a Bloom filter to look up read and write requests from the processor module to the write-absorbing buffer.

13. The method of claim 11 , wherein storing the base page comprises storing a base page address in the copy-on-write table to reference the base page.

14. The method of claim 11 , wherein the copy-on-write page comprises a written update to the base page.

15. The method of claim 11 , wherein the copy-on-write table comprises a page address for the copy-on-write page.

16. The method of claim 11 , wherein writing the copy-on-write page from the write-absorbing buffer to the non-volatile memory comprises implementing a write-only least-recently-used cache replacement policy to evict the copy-on-write page from the write-absorbing buffer.

17. A write-absorbing buffer between a processor module and a non-volatile memory, comprising:

a volatile memory;

a copy-on-write table coupled to the volatile memory to reference a copy-on-write page stored in the volatile memory, the copy-on-write page corresponding to a base page stored in the non-volatile memory; and

a Bloom filter to look-up read and write requests from the processor module into the non-volatile memory coupled to the write-absorbing buffer, the write-absorbing buffer operating as a dirty first level cache that allocates new blocks only for write requests and not read requests.

18. The write-absorbing buffer of claim 17 , further comprising a backup power coupled to the volatile memory to power up the volatile memory in case of a power failure.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 9, 2015
From: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.
To: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP
Reel/Frame 037079/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 29, 2011
From: JICHUAN, CHANG; PARTHASARATHY, RANGANATHAN; DAVID, ROBERTS
To: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.
Reel/Frame 027291/0614 →
Continuity (1)
Related Publication 20120254507A1 · Oct 4, 2012