IP Library Granted Patent US 8,946,074
Granted Patent B2
US 8,946,074 · App. 13/285,007 · Granted Feb 3, 2015

Method of making interconnect structure

Inventor: Heinrich Koerner (Bruckmeuhl, DE)
Assignee: Infineon Technologies AG
H01L23/53252H01L21/76826H01L21/76807H01L21/28512H01L21/76843H01L21/76846H01L21/76873H01L23/485H01L23/53238
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Quick Facts
Patent No.
US 8,946,074
App. No.
13/285,007
Granted
Feb 3, 2015
Kind
B2
Abstract

A method of forming a semiconductor device, comprising: providing a Si-containing layer; forming a barrier layer over said Si-containing layer, said barrier layer comprising a compound including a metallic element; forming a metallic nucleation_seed layer over said barrier layer, said nucleation_seed layer including said metallic element; and forming a metallic interconnect layer over said nucleation_seed layer, wherein said barrier layer and said nucleation_seed layer are formed without exposing said semiconductor device to the ambient atmosphere.

Claims (14)

1. A method semiconductor device, comprising:

providing a Si-containing layer;

forming a metallic contact layer over said Si-containing layer, said contact layer including a metallic element;

forming a forming a barrier layer over said Si-containing layer, said barrier layer comprising a compound including said metallic element;

forming a metallic nucleation_seed layer over said barrier layer, said nucleation seed layer including said metallic element; and

forming a metallic interconnect layer over said nucleation seed layer,

wherein said contact layer, barrier layer and said nucleation_seed layer are formed in the same chamber without exposing said semiconductor device to the ambient atmosphere.

2. The method of claim 1 , wherein said metallic element is an element selected from the group consisting of W (tungsten), Ti (titanium), Ta (tantalum), Mo (molybdenum), and Co (cobalt).

3. The method of claim 1 , metallic element is W (tungsten).

4. The method of claim 1 , wherein said Si-containing layer comprises a silicide and/or a doped silicon.

5. The method of claim 1 , interconnect layer comprises at least wherein said one element selected from the group consisting of Cu (copper), Au (gold), and Ag (silver).

6. The method of claim 1 , wherein interconnect layer comprises Cu (copper).

7. The method of claim 6 , wherein said Cu (copper) is in form of pure copper and/or a copper alloy.

8. The method of claim 1 , wherein said forming said interconnect layer comprises an electrochemical deposition process.

Continuity (2)
Division 12241083 · Sep 30, 2008
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