Semiconductor device with sealed semiconductor chip
A semiconductor device includes a semiconductor chip with bonding pads, the bonding pads being arranged along one side of an element forming surface of the semiconductor chip, a lead frame including first and second internal leads arranged such that tips thereof correspond to some of the bonding pads of the semiconductor chip, and first and second bonding wires by which the first internal leads and the some of the bonding pads are bonded to each other. The semiconductor device further includes a hanging pin section provided on the element non-forming surface of the semiconductor chip, and a sealing member with which the semiconductor chip is sealed including the hanging pin section and a bonding section between the first and second internal leads and the first and second bonding wires.
1. A semiconductor device comprising:
a semiconductor chip having:
a first side and a second side perpendicular to the first side, wherein a maximum length of the first side is longer than that of the second side;
a first surface, and a second surface opposite to the first surface; and
first bonding pads and second bonding pads being alternately arranged along the first side of the second surface;
leads including flat first internal leads and second internal leads opposite and spaced away from the flat first internal leads;
wherein each of the flat first internal leads including:
a first internal lead first surface, and a first internal lead second surface opposite to the first internal lead first surface;
a first tip section and a first body section;
wherein each of the second internal leads including:
a second internal lead first surface, and a second internal lead second surface opposite to the second internal lead first surface; and
a second tip section and a second body section;
the leads further including first external leads communicating with the flat first internal leads and second external leads communicating with the second internal leads;
first bonding wires electrically connected the flat first internal leads and the first bonding pads, respectively;
second bonding wires electrically connected the second internal leads and the second bonding pads, respectively; and
a sealing member seals the semiconductor chip; the flat first internal leads, the first bonding wires, the second internal leads, and the second bonding wires;
wherein the first surface the semiconductor chip is attached to the second internal lead second surfaces of the second internal leads by an insulating film to expose the second tip sections from the first side and to cover portions of the second body sections;
wherein the first external leads and the second external leads are exposed from the sealing member.
2. The semiconductor device according to claim 1 , wherein the second internal leads further comprising at least one hanging pin,
wherein the at least one hanging pin is exposed from the second side of the semiconductor chip.
3. The semiconductor device according to claim 2 , wherein the at least one hanging pin is arranged to support the semiconductor chip.
4. The semiconductor device according to claim 1 , wherein the second tip sections are located between the first tip sections and the semiconductor chip.
5. The semiconductor device according to claim 1 , wherein a thickness of the sealing member at the second internal lead first surface is thicker than the thickness of the sealing member at the second internal lead second surface.
6. The semiconductor device according to claim 1 , wherein the semiconductor chip includes a memory chip.
7. The semiconductor device according to claim 6 , wherein the memory chip is NAND flash memory.
8. A semiconductor device comprising:
a semiconductor chip including:
a first side and a second side perpendicular to the first side, wherein a maximum length of the first side is longer than that of the second side;
a first surface and a second surface opposite to the first surface; and
first bonding pads and second bonding pads being alternately arranged along the first side of the second surface;
leads including flat first internal leads and second internal leads opposite and spaced away from the flat first internal leads;
wherein each of the flat first internal leads including:
a first internal lead first surface, and a first internal lead second surface opposite to the first internal lead first surface;
a first tip section and a first body section;
wherein each of the second internal leads including:
a second internal lead first surface, and a second internal lead second surface opposite to the second internal lead first surface; and
a second tip section and a second body section;
wherein the leads further including first L-shaped external leads communicating with the flat first internal leads and second L-shaped external leads communicating with the second internal leads;
first bonding wires electrically connected the flat first internal leads and the first bonding pads, respectively;
second bonding wires electrically connected the second internal leads and the second bonding pads, respectively; and
a sealing member seals the semiconductor chip; the flat first internal leads, the first bonding wires, the second internal leads, and the second bonding wires;
wherein the first surface the semiconductor chip is attached to the second internal lead second surfaces of the second internal leads by an insulating film to expose the second tip sections from the first side and to cover portions of the second body sections;
wherein the first L-shaped external leads and the second L-shaped external leads are exposed from the sealing member.
9. A semiconductor device comprising:
a semiconductor chip including:
a first surface and a second surface opposite to the first surface;
a first side and a second side perpendicular to the first side, wherein a maximum length of the first side is longer than that of the second side; and
first bonding pads and second bonding pads being alternately arranged along the first side of the second surface;
a lead frame including flat first internal leads and second internal leads opposite and spaced away from the flat first internal leads;
wherein each of the flat first internal leads including:
a first internal lead first surface, and a first internal lead second surface opposite to the first internal lead first surface;
a first tip section and a first body section;
wherein each of the second internal leads including:
a second internal lead first surface, and a second internal lead second surface opposite to the second internal lead first surface; and
a second tip section and a second body section;
wherein the first surface the semiconductor chip is attached to the second internal lead second surfaces of the second internal leads by an insulating film to expose the second tip sections from the first side and to cover portions of the second body sections;
the lead frame further including first external leads communicating with the flat first internal leads and second external leads communicating with the second internal leads;
first bonding wires electrically connected the flat first internal leads and the first bonding pads, respectively;
second bonding wires electrically connected the second internal leads and the second bonding pads, respectively; and
a sealing member seals the semiconductor chip; the flat first internal leads, the first bonding wires, the second internal leads, and the second bonding wires;
wherein the first internal lead first surface and the second internal lead first surface are in a same first plane; and
wherein the first internal lead second surface and the second internal lead second surface are in a same second plane.
10. The semiconductor device according to claim 9 ,
wherein
the first external leads and the second external leads are exposed from the sealing member.
11. The semiconductor device according to claim 10 , wherein the second internal leads further comprising at least one hanging pin,
wherein the at least one hanging pin is exposed from the second side of the semiconductor chip.
12. The semiconductor device according to claim 11 , wherein the at least one hanging pin is arranged to support the semiconductor chip.
13. The semiconductor device according to claim 10 , wherein the second tip sections are located between the first tip sections and the semiconductor chip.
14. The semiconductor device according to claim 10 , wherein a thickness of the sealing member at the second internal lead first surface is thicker than the thickness of the sealing member at the second internal lead second surface.
15. The semiconductor device according to claim 9 wherein each of the first external leads and the second external leads including a bended section, the bended section is beyond a back side of the sealing member and parallel to the first surface and the second surface of the semiconductor chip.
16. The semiconductor device according to claim 15 , wherein mounted areas of each of the first external leads and the second external leads are parallel to the first surface and the second surface of the semiconductor chip.
17. The semiconductor device according to claim 9 , wherein ends of each of the first external leads and the second external leads are positioned beyond a back side of the sealing member and parallel to the first surface and the second surface of the semiconductor chip.