Semiconductor device for offset compensation of reference current

1. A semiconductor device, comprising:

a reference current generator suitable for generating one reference current;

a current-voltage converter suitable for generating a first reference voltage and a second reference voltage in response to the one reference current; and

an analog-digital converter suitable for generating a digital code value based on a voltage difference between the first and second reference voltages, wherein the reference current generator includes a current control unit for controlling the one reference current in response to the digital code value.

2. The semiconductor device of claim 1 , wherein the current control unit includes a plurality of transistors that are enabled in response to the digital code value.

3. The semiconductor device of claim 1 , wherein the one reference current is transferred from the reference current generator to the current-voltage converter in response to a bias signal.

4. The semiconductor device of claim 1 , wherein the current-voltage converter includes:

a first reference voltage generation unit suitable for generating the first reference voltage in response to the one reference current; and

a second reference voltage generation unit suitable for generating the second reference voltage in response to the one reference current.

5. The semiconductor device of claim 4 , wherein the first reference voltage generation unit includes an active device, and the second reference voltage generation unit includes a passive device.

6. The semiconductor device of claim 1 , wherein the reference current generator is a Widlar-type reference current generation circuit.

7. A method for compensating an offset of a current comprising:

generating one reference current;

converting the one reference current into a first reference voltage and a second reference voltage;

generating a digital code value based on a voltage difference between the first reference voltage and the second reference voltage; and

adjusting the one reference current based on the digital code value.

8. The method of claim 7 , wherein the converting of the one reference current into the first reference voltage and the second reference voltage includes:

generating a bias signal to transfer the one reference current; and

generating the first reference voltage and the second reference voltage based on the transferred one reference current in response to the bias signal.

9. The method of claim 8 , wherein the generating of the first reference voltage and the second reference voltage in response to the bias signal includes:

generating the first reference voltage using an active device; and

generating the second reference voltage using a passive device.

10. The method of claim 7 , wherein the adjusting of the one reference current based on the digital code value includes:

enabling a plurality of transistors for the one reference current to flow through based on the digital code value.

11. A semiconductor device, comprising:

a reference current generator suitable for generating one reference current in response to a digital code value;

a current-voltage converter suitable for converting the one reference current into a first reference voltage and a second reference voltage in different proportions; and

an analog-digital converter suitable for generating a digital code value based on a voltage difference between the first and second reference voltages.

12. The semiconductor device of claim 11 , wherein the current-voltage converter includes:

a first reference voltage generation unit suitable for generating the first reference voltage with first current-voltage characteristics in response to the one reference current; and

a second reference voltage generation unit suitable for generating the second reference voltage with second current-voltage characteristics different from the first current-voltage characteristics in response to the one reference current.

13. The semiconductor device of claim 11 , wherein the reference current generator adjusts the one reference current in response to the digital code value and includes a current control unit suitable for enabling a plurality of transistors for the one reference current to flow through based on the digital code value.