Injection locked pulsed oscillator
An injection locked pulsed oscillator includes a voltage controlled oscillator (VCO) responsive to an injection signal. The injection locked pulsed oscillator includes at least one enable circuit responsive to a first enable signal to enable output pulses from the VCO. The injection locked pulsed oscillator also includes timing circuit responsive to a pulse repetition frequency signal and is configured to provide the injection signal to phase lock the VCO and provide the first enable signal delayed from the injection signal to shape a width of the output pulses from the VCO.
1. An injection locked pulsed oscillator comprising:
a voltage controlled oscillator (VCO) responsive to an injection signal including at least one enable circuit responsive to a first enable signal to enable output pulses from the VCO; and
a timing circuit responsive to a pulse repetition frequency signal and configured to provide the injection signal to phase lock the VCO and provide the first enable signal delayed from the injection signal to shape a width of the output pulses from the VCO.
2. The injection locked pulsed oscillator of claim 1 in which the timing circuit includes an injection signal generator configured to provide the injection signal and a first pulse generator to provide the first enable signal.
3. The injection locked pulsed oscillator of claim 1 in which the VCO includes a push-push VCO.
4. The injection locked pulsed oscillator of claim 3 in which the VCO includes a resonator and first and second negative resistance circuits responsive to the resonator.
5. The injection locked pulsed oscillator of claim 4 in which the first and second negative resistance circuits each include an enable circuit responsive to the first enable signal.
6. The injection locked pulsed oscillator of claim 1 in which the VCO is responsive to a control signal and configured to tune the center frequency of the VCO.
7. The injection locked pulsed oscillator of claim 1 further including a buffer circuit responsive to the VCO.
8. The injection locked pulsed oscillator of claim 7 in which the timing circuit further includes a second pulse generator configured to provide a second enable signal and the buffer circuit includes a buffer enable circuit responsive to the second enable signal and configured to enable the buffer circuit.
9. The injection locked pulsed oscillator of claim 8 in which the first and second enable signals each include a pulse.
10. The injection locked pulsed oscillator of claim 9 in which the second enable pulse starts before and finishes after the first enable signal.
11. The injection locked pulsed oscillator of claim 3 in which one of the harmonic components of the injection signal phase locks to approximately half the center frequency of the output signal of the push-push VCO.
12. The injection locked pulsed oscillator of claim 1 in which the injection signal includes a fast leading-edge step signal.
13. An injection locked pulsed oscillator comprising:
a push-push voltage controlled oscillator (VCO) including a resonator responsive to an injection signal and first and second negative resistance circuits each having an enable circuit responsive to a first enable signal to enable output pulses from the VCO; and
a timing circuit responsive to a pulse repetition frequency signal including:
an injection signal generator configured to provide the injection signal to phase lock the VCO, and
a first pulse generator configured to provide the first enable signal delayed from the injection signal to shape a width of the output pulses from the VCO.
14. The injection locked pulsed oscillator of claim 13 in which the VCO is responsive to a control signal and configured to tune the center frequency of the VCO.
15. The injection locked pulsed oscillator of claim 14 further including a buffer circuit responsive to the VCO.
16. The injection locked pulsed oscillator of claim 15 in which the timing circuit further includes a second pulse generator configured to provide a second enable signal and the buffer circuit includes a buffer enable circuit responsive to the second enable signal and configured to enable the buffer circuit.
17. The injection locked pulsed oscillator of claim 16 in which the first and second enable signals each include a pulse.
18. The injection locked pulsed oscillator of claim 17 in which the second enable pulse starts before and finishes after the first enable pulse.
19. The injection locked pulsed oscillator of claim 13 in which one of the harmonic components of the injection signal phase locks to approximately half the center frequency of the output signal of the push-push VCO.
20. The injection locked pulsed oscillator of claim 13 in which the injection signal includes a fast leading-edge step signal of longer duration than the first enable.
21. The injection locked pulsed oscillator of claim 13 in which each negative resistance circuit includes an oscillator having a control terminal and each enable circuit includes:
first and second complementary transistors each having a control terminal responsive to the first enable signal, the first transistor coupled between a power supply and the control terminal of the oscillator and configured to charge and enable the oscillator, the second transistor coupled between a ground and the control terminal of the oscillator and configured to discharge and disable the oscillator.
22. The injection locked pulsed oscillator of claim 16 in which the buffer circuit includes a control terminal and the buffer enable circuit includes:
first and second complementary transistors each having a control terminal responsive to the second enable signal, the first transistor coupled between a power supply and the control terminal of the buffer and configured to enable the buffer, the second transistor coupled between a ground and the control terminal of the buffer and configured to disable the buffer.
23. A method for phase locking an injection locked pulsed oscillator, the method comprising:
providing a voltage controlled oscillator (VCO) responsive to an injection signal and having at least one enable circuit responsive to a first enable signal to enable output pulses from the VCO; and
in response to a pulse repetition frequency signal, providing the injection signal to the VCO to phase lock the VCO, and providing the first enable signal delayed from the injection signal to shape a width of the output pulses from the VCO.
24. The method of claim 23 further including:
providing a buffer circuit responsive to the VCO and including a buffer enable circuit; and
in further response to a pulse repetition frequency signal, providing the buffer enable circuit with a second enable signal to enable the buffer circuit.
25. The method of claim 24 in which the second enable pulse starts before and finishes after the first enable pulse.
26. The method of claim 23 in which the injection signal is a balanced signal applied differentially to the VCO.
27. The method of claim 23 in which the injection signal is a single-ended signal.