Power device integration on a common substrate

1. A semiconductor structure comprising at least one Schottky diode power device, the semiconductor structure comprising:

a first insulating layer formed on a substrate;

an active region formed on at least a portion of the first insulating layer;

a buried well having a first conductivity type formed in the active region;

a cathode region having a second conductivity type formed in the active region proximate the upper surface of the active region;

a cathode terminal formed on an upper surface of active region and electrically connecting with the cathode region;

an anode terminal electrically connecting with the active region and the buried well at a region spaced laterally from the cathode region, wherein a Schottky barrier is formed between the anode terminal and the active region; and

the buried well being configured, in conjunction with the active region, to form a clamping diode operative to position a breakdown avalanche region between the buried well and the cathode terminal, a breakdown voltage of the Schottky diode power device being a function of one or more characteristics of the buried well.

2. The semiconductor structure of claim 1 , wherein the Schottky diode further comprises a gate structure formed above the active region proximate the upper surface of the active region and at least partially between the cathode and anode terminals, the gate structure overlapping at least a portion of the buried well and the cathode region, the gate structure being electrically connected with the anode terminal, wherein the gate structure is configured to control an electric field distribution proximate the junction between the cathode region and the active region.

3. The semiconductor structure of claim 2 , further comprising a shielding structure formed proximate the upper surface of the active region between the gate structure and the cathode region, the shielding structure comprising a field plate configured to control an electric field distribution along a top oxide interface away from an edge of the gate structure nearest the cathode terminal.

4. The semiconductor structure of claim 3 , wherein the cathode region includes an first cathode implant region partially underlying the gate structure and extending to a more heavily doped second cathode implant region, the more heavily doped second cathode implant region being in electrical contact to and underlying the cathode terminal.

5. The semiconductor structure of claim 4 , further comprising an implant region of the second conductivity type formed proximate an upper surface of the active region, the implant region of the second conductivity type partially underlying the gate structure and extending to underlie and make electrical contact to the anode terminal, wherein the Schottky barrier is formed between the anode terminal and the implant region of the second conductivity type.

6. The semiconductor structure of claim 1 , wherein the Schottky diode further comprises:

an implant region of the second conductivity type formed proximate an upper surface of the active region and making electrical contact to the anode terminal, wherein the Schottky barrier is formed between the anode terminal and the implant region of the second conductivity type;

a gate structure formed above the active region proximate the upper surface of the active region and at least partially between the cathode and anode terminals, the gate structure overlapping at least a portion of the implant region of the second conductivity type, the active region and the cathode region, the gate structure being electrically isolated from the anode terminal, the gate structure being operative to induce a pinching of the electric field distribution under an applied blocking bias of the cathode terminal to thereby shield the Schottky barrier against an electric field greater than a prescribed level under blocking conditions.

7. The semiconductor structure of claim 6 , wherein the Schottky diode further comprises:

a plurality of trench structures formed substantially vertically through the active region and into the buried well, each of the trenches including sidewalls and a bottom wall having an insulating material formed thereon, each of the trenches being filled with a conductive material, the trenches connecting with the gate structure, wherein a voltage applied to the gate structure is operative to modulate a conduction current which flows between at least two of the trenches, an amplitude of the conduction current being controlled as a function of the applied voltage.

8. The semiconductor structure of claim 1 , wherein the buried well is formed proximate an interface between the first insulating layer and the active region.

9. The semiconductor structure of claim 1 , wherein the at least one Schottky diode power device comprises a plurality of said at least one Schottky diode power devices formed therein and organized in a macro-cell, and the semiconductor structure comprises a plurality of said macro-cells connected together to operate as a single Schottky diode power device.

10. The semiconductor structure of claim 1 , wherein the at least one Schottky diode power device comprises a plurality of like Schottky diode power devices formed therein and connected together through a bus structure to operate as a single Schottky diode power device, wherein the semiconductor structure is part of a chip-scale assembly, the chip-scale assembly comprising a redistribution layer coupling the bus structure to anode and cathode external contacts.