IP Library Granted Patent US 8,995,521
Granted Patent B2
US 8,995,521 · App. 13/663,534 · Granted Mar 31, 2015

Method and apparatus for high density pulse density modulation

Inventors: Donald R. Laturell (Oak Hill, FL); Said E. Abdelli (Minneapolis, MN); Peter Kiss (Basking Ridge, NJ); James F. MacDonald (Stillwater, MN); Ross S. Wilson (Menlo Park, CA); Kameran Azadet (Pasadena, CA)
Assignee: LSI Corporation
H04L27/04H03M5/04H03G11/002
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 8,995,521
App. No.
13/663,534
Granted
Mar 31, 2015
Kind
B2
Abstract

A method and system for high density pulse density modulation is disclosed. In accordance with the present disclosure, a modulation function is split in to two band limited streams using a complementary pair of non-linear functions. More specifically, one bitstream definition contains the peaks of the original function while the other bitstream contains a soft clipping version of the original bitstream. The bitstreams are applied to a pair of switching amplifiers, and the bitstreams can be combined again to reconstruct the original function. The method in accordance with the present disclosure limits the amount of input power necessary to achieve higher output power, lowers operating voltage and improves power amplifier efficiency.

Claims (30)

1. A method for high density pulse density modulation, comprising:

receiving a bitstream;

splitting the bitstream in to two complementary streams based on whether a modulation level exceeds a limiting value v, wherein a first one of the two complementary streams contains a soft clipped stream of the received bitstream limited by the limiting value v, and a second one of the two complementary streams contains only extracted portions of the received bitstream, wherein when a portion of the received bitstream is greater than v, said portion of the received bitstream is represented based on a difference of said portion of the received bitstream and the limiting value v in the second one of the two complementary streams, and wherein when a portion of the received bitstream is less than −v, said portion of the received bitstream is represented based on a sum of said portion of the received bitstream and the limiting value v in the second one of the two complementary streams; and

amplifying each of the two complementary streams independently for transmission.

2. The method of claim 1 , wherein the soft clipped stream contained in the first one of the two complementary streams is compressed.

3. The method of claim 1 , wherein the limiting value is a static value.

4. The method of claim 1 , wherein the limiting value is dynamically adjustable.

5. The method of claim 1 , wherein the limiting value is determined based on a function.

6. The method of claim 1 , further comprising:

amplifying each of the two complementary streams independently for transmission.

7. A system for high density pulse density modulation, comprising:

a bitstream generator configured for generating a bitstream;

a split mechanism communicatively coupled with the bitstream generator, the split mechanism configured for splitting the bitstream in to two complementary streams based on whether a modulation level exceeds a limiting value v, wherein a first one of the two complementary streams contains a soft clipped stream of the received bitstream limited by the limiting value v, and a second one of the two complementary streams contains only extracted portions of the received bitstream, wherein when a portion of the received bitstream is greater than v, said portion of the received bitstream is represented based on a difference of said portion of the received bitstream and the limiting value v in the second one of the two complementary streams, and wherein when a portion of the received bitstream is less than −v, said portion of the received bitstream is represented based on a sum of said portion of the received bitstream and the limiting value v in the second one of the two complementary streams;

a first power amplifier configured for amplifying the first one of the two complementary streams; and

a second power amplifier configured for amplifying the second one of the two complementary streams.

8. The system of claim 7 , wherein the split mechanism is configured to compress the soft clipped stream in the first one of the two complementary streams.

9. The system of claim 7 , wherein the limiting value is a static value.

10. The system of claim 7 , wherein the limiting value is dynamically adjustable.

11. The system of claim 7 , wherein the limiting value is determined based on a function.

12. The system of claim 7 , wherein the first and second power amplifiers operate independently with respect to each other.

13. The system of claim 7 , wherein the first and second power amplifiers are switch-mode power amplifiers.

14. The system of claim 13 , wherein the first and second power amplifiers are Class-S power amplifiers.

15. A bitstream splitting apparatus, comprising:

a processor; and

a computer-readable device having computer-executable instructions for splitting a bitstream in to two complementary streams based on whether a modulation level exceeds a limiting value v, wherein a first one of the two complementary streams contains a soft clipped stream of the bitstream limited by the limiting value v, and a second one of the two complementary streams contains only extracted portions of the bitstream, wherein when a portion of the received bitstream is greater than v, said portion of the received bitstream is represented based on a difference of said portion of the received bitstream and the limiting value v in the second one of the two complementary streams, and wherein when a portion of the received bitstream is less than −v, said portion of the received bitstream is represented based on a sum of said portion of the received bitstream and the limiting value v in the second one of the two complementary streams.

16. The bitstream splitting apparatus of claim 15 , wherein the soft clipped stream contained in the first one of the two complementary streams is compressed.

17. The bitstream splitting apparatus of claim 15 , wherein the limiting value is a static value.

18. The bitstream splitting apparatus of claim 15 , wherein the limiting value is dynamically adjustable.

19. The bitstream splitting apparatus of claim 15 , wherein the limiting value is determined based on a function.

20. The bitstream splitting apparatus of claim 15 , wherein the computer-readable device further includes computer-executable instructions for providing each of the two complementary streams to an independently operating power amplifier.

Assignments (8)
CORRECTIVE ASSIGNMENT TO CORRECT THE EXECUTION DATE OF THE MERGER PREVIOUSLY RECORDED ON REEL 047642 FRAME 0417. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT, Recorded Mar 6, 2019
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 048521/0395 →
MERGER Recorded Oct 5, 2018
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 047642/0417 →
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENTS Recorded Feb 3, 2017
From: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 041710/0001 →
PATENT SECURITY AGREEMENT Recorded Feb 11, 2016
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
Reel/Frame 037808/0001 →
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENT RIGHTS (RELEASES RF 032856-0031) Recorded Feb 2, 2016
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: LSI CORPORATION; AGERE SYSTEMS LLC
Reel/Frame 037684/0039 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 3, 2015
From: LSI CORPORATION
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 035390/0388 →
PATENT SECURITY AGREEMENT Recorded May 8, 2014
From: LSI CORPORATION; AGERE SYSTEMS LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 032856/0031 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 30, 2012
From: LATURELL, DONALD R.; ABDELLI, SAID E.; KISS, PETER; MACDONALD, JAMES F.; WILSON, ROSS S.; AZADET, KAMERAN
To: LSI CORPORATION
Reel/Frame 029208/0978 →
Continuity (1)
Related Publication 20140119427A1 · May 1, 2014