Semiconductor device manufacturing method

1. A method of manufacturing a semiconductor device, comprising:

forming a first interconnect trench and a second interconnect trench adjacent to the first interconnect trench in an interlayer insulating film;

providing a first interconnect and a space on the first interconnect within said first interconnect trench, and a second interconnect and a space on the second interconnect within said second interconnect trench;

forming a first trench resulting from said first interconnect trench being increased in width and a second trench resulting from said second interconnect trench being increased in width, by carrying out isotropic etching, to expose a respective protrusion portion of each of the first interconnect in the first trench and the second interconnect in the second trench; and

forming a first insulating film within said first trench and a second insulating film within said second trench by filling an insulating material in said first trench and said second trench.

2. The method of manufacturing a semiconductor device according to claim 1 , further comprising:

forming a hole passing through between said first interconnect and said second interconnect and penetrating said interlayer insulating film self-alignedly with said first insulating film and said second insulating film, by carrying out anisotropic etching utilizing said first and second insulating films as masks; and

forming a plug by filling a conductive material in said hole.

3. The method of manufacturing a semiconductor device according to claim 1 , wherein said interlayer insulating film is a silicon oxide film, and said first insulating film and said second insulating film are silicon nitride films.

4. The method of manufacturing a semiconductor device according to claim 1 , wherein a thickness of the interlayer insulating film is 1.2 times or larger and 5 times or less than the thickness of the first and second interconnect.

5. The method of manufacturing a semiconductor device according to claim 4 , wherein a thickness of the interlayer insulating film is 1.8 times or larger and 2.5 times or less than the thickness of the first and second interconnect.

6. The method of manufacturing a semiconductor device according to claim 2 , wherein said semiconductor device comprises:

a memory cell array in which memory cells are matrix-arranged, each of the memory cells comprising a transistor and a storage element;

word lines constituting gates of the transistors; and

bit lines intersecting with the word lines and connected to drains of the transistors; and

said first interconnect and said second interconnect are formed as the bit lines.

7. The method of manufacturing a semiconductor device according to claim 6 , wherein said bit lines include a laminated film made of a tungsten nitride and a tungsten.

8. The method of manufacturing a semiconductor device according to claim 6 , wherein a lower end of said plug is connected to a contact plug in contact with a semiconductor substrate, and an upper end of said plug is connected to one of the storage elements.

9. The method of manufacturing a semiconductor device according to claim 2 , wherein said semiconductor device comprises:

a memory cell array in which memory cells are matrix-arranged, each of the memory cells comprising a transistor and a capacitor;

word lines constituting gates of the transistors; and

bit lines intersecting with the word lines and connected to drains of the transistors; and

said first interconnect and said second interconnect are formed as the word lines.

10. The method of manufacturing a semiconductor device according to claim 9 , said first interconnect and said second interconnect are formed in a semiconductor substrate.

11. The method of manufacturing a semiconductor device according to claim 9 , wherein said plug is formed as a contact plug in contact with a semiconductor substrate.

12. A method of manufacturing a semiconductor device, comprising:

forming a first interconnect trench and a second interconnect trench adjacent to the first interconnect trench in an interlayer insulating film;

forming a first conductive film on said interlayer insulating film such that said first interconnect trench and said second interconnect trench are filled with the first conductive film;

removing a portion of said first conductive film external to said first interconnect trench and said second interconnect trench, an upper portion of said first conductive film within said first interconnect trench, and an upper portion of said first conductive film within said second interconnect trench, thereby forming a first interconnect and a space on the first interconnect within said first interconnect trench, and a second interconnect and a space on the second interconnect within said second interconnect trench;

forming a first mask trench resulting from said first interconnect trench being increased in width and a second mask trench resulting from said second interconnect trench being increased in width, by carrying out isotropic etching;

forming a masking insulating film on said interlayer insulating film such that said first mask trench and said second mask trench are filled with the masking insulating film;

removing a portion of said masking insulating film external to said first mask trench and said second mask trench, thereby forming a first mask insulating film within said first mask trench and a second mask insulating film within said second mask trench;

forming a hole passing through between said first interconnect and said second interconnect and penetrating said interlayer insulating film self-alignedly with said first mask insulating film and said second mask insulating film, by carrying out anisotropic etching utilizing said first and second mask insulating films as masks;

forming a second conductive film such that said hole is filled with the second conductive film; and

removing a portion of said second conductive film external to said hole, thereby forming a plug within said hole.

13. The method of manufacturing a semiconductor device according to claim 12 , wherein said interlayer insulating film is a silicon oxide film, and said first mask insulating film and said second mask insulating film are silicon nitride films.

14. The method of manufacturing a semiconductor device according to claim 12 , wherein said semiconductor device comprises:

a memory cell array in which memory cells are matrix-arranged, each of the memory cell comprising a transistor and a storage element;

word lines constituting gates of the transistors; and

bit lines intersecting with the word lines and connected to drains of the transistors; and

said first interconnect and said second interconnect are formed as the bit lines.

15. The method of manufacturing a semiconductor device according to claim 14 , wherein a lower end of said plug is connected to a contact plug in contact with a semiconductor substrate, and an upper end of said plug is connected to one of the storage elements.

16. The method of manufacturing a semiconductor device according to claim 12 , wherein said semiconductor device comprises:

a memory cell array in which memory cells are matrix-arranged, each of the memory cells comprising a transistor and a capacitor;

word lines constituting gates of the transistors; and

bit lines intersecting with the word lines and connected to drains of the transistors; and

said first interconnect and said second interconnect are formed as the word lines.

17. The method of manufacturing a semiconductor device according to claim 16 , wherein said plug is formed as a contact plug in contact with a semiconductor substrate.

18. A method of manufacturing a semiconductor device, comprising:

forming an interlayer insulating film on a substrate;

forming a first interconnect trench and a second interconnect trench adjacent to the first interconnect trench in the interlayer insulating film;

filling a first conductive film in the first interconnect trench and the second interconnect trench;

removing an upper portion of the first conductive film in the first interconnect trench and the second interconnect trench;

forming a first mask trench and a second mask trench by removing the upper portion of the interlayer insulation film over the first conductive film, wherein both width of the first mask trench and the second mask trench are larger than a width of the first conductive film;

filling a masking insulating film in the first mask trench and the second mask trench;

forming a hole between the first interconnect trench and the second interconnect trench by using the masking insulating film as an etching mask; and

forming a plug by filling the hole with a second conductive film.

19. The method of manufacturing a semiconductor device according to claim 18 , wherein forming a first mask trench and a second mask trench is performed by wet etching.

20. The method of manufacturing a semiconductor device according to claim 18 , wherein said interlayer insulating film is a silicon oxide film, and said masking insulating film is a silicon nitride film.