IP Library Granted Patent US 9,008,095
Granted Patent B2
US 9,008,095 · App. 13/633,734 · Granted Apr 14, 2015

System and method for hardware-based learning of internet protocol addresses in a network environment

Inventors: Shyam Kapadia (Santa Clara, CA); Nilesh Shah (Fremont, CA); Putu H. Subagio (Cupertino, CA)
Assignee: Cisco Technology, Inc.
H04L45/08H04L45/74H04L29/12811H04L45/745H04L61/6009
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Quick Facts
Patent No.
US 9,008,095
App. No.
13/633,734
Granted
Apr 14, 2015
Kind
B2
Abstract

A method is provided one example embodiment and includes receiving a packet including a source /32 address and a destination /32 address. The source /32 address can indicate an Internet Protocol (IP) address of a source host that sent the packet. The destination /32 address can indicate an IP address of a destination host to which the packet is destined. The method may also include looking up the destination /32 address and the source /32 address in a Forwarding Information Base/adjacency (FIB)/(ADJ) table implemented in a hardware of a leaf switch in a network. Additionally, the method may include adding the source /32 address and corresponding adjacency information to the FIB/ADJ table if the destination /32 address is found in the FIB/ADJ table, and the source /32 address is not found in the FIB/ADJ table. The method may also include forwarding the packet to the destination host.

Claims (52)

1. A method, comprising:

receiving a packet at a leaf switch in a network, the packet including a source address and a destination address, wherein the source address indicates an Internet Protocol (IP) address of a source host that sent the packet, wherein the destination address indicates an IP address of a destination host to which the packet is destined, wherein when a destination Media Access Control (DMAC) address of the packet is a MAC address of the leaf switch, the method further comprises:

looking up the destination address and the source address in a Forwarding Information Base/adjacency (FIB)/(ADJ) table implemented in a hardware of the leaf switch;

adding the source address and corresponding adjacency information to the FIB/ADJ table when the destination address is found in the FIB/ADJ table and the source address is not found in the FIB/ADJ table; and

forwarding the packet to the destination host, wherein the source address and the destination address are 32 bit IP version 4 addresses.

2. The method of claim 1 , further comprising:

dropping the packet when the destination address and the source address are not found in the FIB/ADJ table.

3. The method of claim 1 , further comprising:

looking up a destination subnet having a subnet prefix corresponding to the destination address; and

multicasting the packet to the destination subnet when the destination address is not found in the FIB/ADJ table and the source address is found in the FIB/ADJ table.

4. The method of claim 1 , further comprising:

configuring subnet prefixes of subnets in the network in the FIB/ADJ table.

5. The method of claim 1 , further comprising:

installing addresses of hosts connected to the leaf switch.

6. The method of claim 1 , further comprising:

setting a learnt bit in the FIB/ADJ table when the source address is added; and

resetting a corresponding hit bit when the destination address or the source address is found in the FIB/ADJ table.

7. The method of claim 6 , further comprising:

deleting an entry in the FIB/ADJ table corresponding to the destination address and the source address according to an aging criterion.

8. The method of claim 7 , wherein the aging criterion is a predetermined time interval.

9. The method of claim 7 , wherein the aging criterion is a predetermined threshold level of free space allocated to the FIB/ADJ table.

10. The method of claim 1 , wherein the source address is learnt on leaf switches that are part of a Distributed Ether Channel (DEC), through which a destination dual-homed server is reached.

11. A non-transitory computer readable medium that includes instructions for execution and when executed by a processor of a leaf switch in a network, is configured to perform operations comprising:

receiving a packet including a source /32 address and a destination address, wherein the source address indicates an Internet Protocol (IP) address of a source host that sent the packet, wherein the destination address indicates an IP address of a destination host to which the packet is destined, wherein when a destination Media Access Control (DMAC) address of the packet is a MAC address of the leaf switch, the operations further comprises:

looking up the destination address and the source address in a Forwarding Information Base/adjacency (FIB)/(ADJ) table implemented in a hardware of the leaf switch;

adding the source address and corresponding adjacency information to the FIB/ADJ table when the destination address is found in the FIB/ADJ table and the source address is not found in the FIB/ADJ table; and

forwarding the packet to the destination host, wherein the source address and the destination address are 32 bit IP version 4 addresses.

12. The non-transitory computer readable medium of claim 11 , the operations further comprising:

dropping the packet when the destination address and the source address are not found in the FIB/ADJ table.

13. The non-transitory computer readable medium of claim 11 , the operations further comprising:

looking up a destination subnet having a subnet prefix corresponding to the destination address; and

multicasting the packet to the destination subnet when the destination address is not found in the FIB/ADJ table and the source address is found in the FIB/ADJ table.

14. The non-transitory computer readable medium of claim 11 , the operations further comprising:

configuring subnet prefixes of subnets in the network in the FIB/ADJ table.

15. The non-transitory computer readable medium of claim 11 , the operations further comprising:

installing addresses of hosts connected to the leaf switch.

16. An apparatus, comprising:

a memory element for storing data; and

a processor configured to execute instructions associated with the data, wherein the processor and the memory element cooperate, such that the apparatus is configured as a leaf switch for:

receiving a packet including a source address and a destination address, wherein the source address indicates an Internet Protocol (IP) address of a source host that sent the packet, wherein the destination address indicates an IP address of a destination host to which the packet is destined, wherein when a destination Media Access Control (DMAC) address of the packet is a MAC address of the apparatus, the apparatus is further configured for:

looking up the destination address and the source address in a Forwarding Information Base/adjacency (FIB)/(ADJ) table implemented in a hardware of the apparatus;

adding the source address and corresponding adjacency information to the FIB/ADJ table when the destination address is found in the FIB/ADJ table and the source address is not found in the FIB/ADJ table; and

forwarding the packet to the destination host, wherein the source address and the destination address are 32 bit IP version 4 addresses.

17. The apparatus of claim 16 , further configured for:

dropping the packet when the destination address and the source address are not found in the FIB/ADJ table.

18. The apparatus of claim 16 , further configured for:

looking up a destination subnet having a subnet prefix corresponding to the destination address; and

multicasting the packet to the destination subnet when the destination address is not found in the FIB/ADJ table and the source address is found in the FIB/ADJ table.

19. The apparatus of claim 16 , further configured for:

configuring subnet prefixes of subnets in the network in the FIB/ADJ table.

20. The apparatus of claim 16 , further configured for:

installing addresses of hosts connected to the apparatus.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 2, 2012
From: KAPADIA, SHYAM; SHAH, NILESH; SUBAGIO, PUTO H.
To: CISCO TECHNOLOGY, INC.
Reel/Frame 029064/0814 →
Continuity (1)
Related Publication 20140092901A1 · Apr 3, 2014