High holding voltage, mixed-voltage domain electrostatic discharge clamp

1. An electrostatic discharge (ESD) protection circuit configured to operate in a normal operation mode and an ESD operation mode, for protecting circuitry coupled between a first node and a second node, the ESD protection circuit comprising:

at least one clamping device coupled to the first node, wherein each of the at least one clamping device is a low voltage device, wherein each of the at least one clamping device has a first maximum voltage rating during the normal operation mode, and wherein each of the at least one clamping device is configured to trigger during the ESD mode and is configured to be off during the normal operation mode;

a switching device coupled in series with the at least one clamping device and coupled to the second node, wherein the switching device is a high voltage device, wherein the switching device has a second maximum voltage rating during the normal operation mode that is higher than the first maximum voltage rating during the normal operation mode, and wherein the switching device is configured to trigger during the ESD mode and is configured to be off during the normal operation mode; and

a voltage limiter coupled to the at least one clamping device and configured to limit a voltage over the at least one clamping device during the normal operation mode.

2. The ESD protection circuit of claim 1 , wherein the low voltage device is formed by a first process design rule defining the first maximum voltage rating and wherein the high voltage device is formed by a second process design rule defining the second maximum voltage rating.

3. The ESD protection circuit of claim 1 , wherein a maximum voltage level corresponding to reliability requirements of the switching device is higher than a maximum voltage level corresponding to reliability requirements of the at least one clamping device.

4. The ESD protection circuit of claim 1 , wherein the at least one clamping device includes a plurality of serially-coupled clamping devices.

5. The ESD protection circuit of claim 1 , wherein the at least one clamping device includes at least one metal oxide semiconductor (MOS) device.

6. The ESD protection circuit of claim 5 , wherein the at least one MOS device is at least one low-voltage domain MOS device.

7. The ESD protection circuit of claim 5 , wherein each MOS device of the at least one MOS device comprises a gate and a source, and wherein the gate of each MOS device is connected to the respective source thereof.

8. The ESD protection circuit of claim 5 , wherein a MOS device of the at least one MOS device comprises a gate, a drain, and a source, and

further wherein the at least one clamping device includes at least one resistive voltage divider, the at least one resistive voltage divider including:

a first terminal having a first terminal voltage;

a second terminal having a second terminal voltage; and

a third terminal having a third terminal voltage;

wherein the second terminal voltage is a divided voltage of a voltage difference between the third terminal voltage and the first terminal voltage; and

wherein the gate of the MOS device is coupled to the second terminal of the at least one resistive voltage divider, the drain of the MOS device is coupled to the first terminal of the at least one resistive voltage divider, and the source of the MOS device is coupled to the third terminal of the at least one resistive voltage divider.

9. The ESD protection circuit of claim 1 , wherein the switching device is a silicon controlled rectifier (SCR).

10. The ESD protection circuit of claim 1 , wherein the voltage limiter is a resistor.

11. The ESD protection circuit of claim 1 , wherein the voltage limiter is a metal oxide semiconductor (MOS) device.

12. The ESD protection circuit of claim 1 , further comprising a triggering device coupled to the switching device, the triggering device configured to switch on the switching device during the ESD mode.

13. The ESD protection circuit of claim 12 , wherein the triggering device comprises at least one diode.

14. The ESD protection circuit of claim 13 , wherein the triggering device further comprises:

a MOS device including a drain, a source, and a gate; and

a resistive element;

wherein the at least one diode is coupled between the drain of the MOS device and the gate of the MOS device, and further wherein the resistive element is coupled between the gate of the MOS device and the source of the MOS device.

15. The ESD protection circuit of claim 9 , wherein the SCR includes:

an anode, a cathode, a first trigger tap, and a second trigger tap;

wherein the cathode of the SCR is coupled to an anode of the clamping device; and

further wherein the voltage limiter is coupled between the cathode of the SCR and the first node.

16. The ESD protection circuit of claim 9 , wherein the SCR includes:

an anode, a cathode, a first trigger tap, and a second trigger tap;

wherein the cathode of the SCR is coupled to an anode of the clamping device; and

further wherein the voltage limiter is coupled between the first trigger tap of the SCR and the first node.

17. The ESD protection circuit of claim 9 , wherein the SCR includes:

an anode, a cathode, a first trigger tap, and a second trigger tap;

wherein the anode of the SCR is coupled to a cathode of the clamping device; and

further wherein the voltage limiter is coupled between the anode of the SCR and the first node.

18. The ESD protection circuit of claim 9 , wherein the SCR includes:

an anode, a cathode, a first trigger tap, and a second trigger tap;

wherein the anode of the SCR is coupled to a cathode of the clamping device; and

further wherein the voltage limiter is coupled between the second trigger tap of the SCR and the first node.

19. The ESD protection circuit of claim 15 , further comprising at least one of:

a first triggering device coupled between the first node and the first trigger tap of the SCR, the first triggering device configured to turn on the SCR during the ESD mode; and

a second triggering device coupled between the second trigger tap of the SCR and the second node, the second triggering device configured to turn on the SCR during the ESD mode.

20. The ESD protection circuit of claim 16 , further comprising at least one of:

a first triggering device coupled between the first node and the first trigger tap of the SCR, the first triggering device configured to turn on the SCR during the ESD mode; and

a second triggering device coupled between the second trigger tap of the SCR and the second node, the second triggering device configured to turn on the SCR during the ESD mode.

21. The ESD protection circuit of claim 17 , further comprising at least one of:

a first triggering device coupled between the first node and the first trigger tap of the SCR, the first triggering device configured to turn on the SCR during the ESD mode; and

a second triggering device coupled between the second trigger tap of the SCR and the second node, the second triggering device configured to turn on the SCR during the ESD mode.

22. The ESD protection circuit of claim 18 , further comprising at least one of:

a first triggering device coupled between the first node and the first trigger tap of the SCR, the first triggering device configured to turn on the SCR during the ESD mode; and

a second triggering device coupled between the second trigger tap of the SCR and the second node, the second triggering device configured to turn on the SCR during the ESD mode.

23. An electrostatic discharge (ESD) protection circuit configured to operate in a normal operation mode and an ESD operation mode, for protecting circuitry coupled between a first node and a second node, the ESD protection circuit comprising:

at least one clamping device having a maximum voltage rating below a voltage between the first node and the second node during the normal operation mode;

a switching device; and

a voltage limiter;

wherein a combination of the voltage limiter and the switching device is configured to divide the voltage between the first node and the second node during the normal operation mode such that the voltage across the at least one clamping device is limited to a voltage below the maximum voltage rating, and wherein the switching device is configured, during the ESD mode, to drop, across the switching device, substantially all of a voltage between the first node and the second node in excess of a forward voltage drop across the at least one clamping device.

24. The ESD protection circuit of claim 23 , wherein the at least one clamping device includes at least one metal oxide semiconductor (MOS) device, the switching device includes a silicon controlled rectifier (SCR), and the voltage limiter includes a resistor.