Filtering mechanism for render target line modification
Modification messages may be filtered to reduce the load on a message channel between a render cache and a frame buffer compression. A group of cache lines may be checked to see whether both a subspan request hits an unlit bit and a modify message was already sent. If so, the modification message may be filtered.
1. A method comprising:
processing a group of render target cache line modifications;
after processing the group of modifications, determining whether a modification message is unneeded for an instance where a render target cache line was modified; and
filtering an unneeded render target line modification message.
2. The method of claim 1 including filtering modification messages over a channel between a frame buffer compression and a render cache.
3. The method of claim 1 including processing a group of 16 lines.
4. The method of claim 1 including setting a first bit in a first array when a subspan request hits an unlit bit.
5. The method of claim 4 including setting a second bit in a second array when a modification message has already been sent.
6. The method of claim 5 including filtering a modification message when the first and second bits are set.
7. A non-transitory computer readable medium storing instructions to enable a computer to:
keep track of render target cache line modifications; and
use information about render target cache line modifications to filter an unneeded render target cache line modification message.
8. The medium of claim 7 further storing instructions to process a group of render target cache modifications.
9. The medium of claim 8 further storing instructions to process a group of 16 lines.
10. The medium of claim 8 further storing instructions to determine whether modification messages are needed for every instance where a render target cache line was modified after processing the group of modifications.
11. The medium of claim 7 further storing instructions to filter modification messages over a channel between a frame buffer compression and a render cache.
12. The medium of claim 7 further storing instructions to set a first bit in a first array when a modification message has already been sent.
13. The medium of claim 12 further storing instructions to set a second bit in a second array when a subspan request hits an unlit bit.
14. The medium of claim 13 further storing instructions to filter a modification message when both the first and second bits are set.
15. A processor comprising:
a render cache including a buffer to filter an unneeded cache line modification message;
a frame buffer compression; and
a message channel between said frame buffer compression and said render cache.
16. The processor of claim 15 , said buffer to determine when a subspan request hits an unlit bit.
17. The processor of claim 16 , said buffer to determine when a modify message has already been sent.
18. The processor of claim 17 , said buffer to process a plurality of cache line modification requests as a group.
19. The processor of claim 18 wherein said group includes a plurality of subspans.
20. The processor of claim 15 , said processor to send a modification message for a group only when both a subspan request hits an unlit bit and a modify message has not already been sent once for the group.