Systems, circuits, devices, and methods with bidirectional bipolar transistors
Methods, systems, circuits, and devices for power-packet-switching power converters using bidirectional bipolar transistors (BTRANs) for switching. Four-terminal three-layer BTRANs provide substantially identical operation in either direction with forward voltages of less than a diode drop. BTRANs are fully symmetric merged double-base bidirectional bipolar opposite-faced devices which operate under conditions of high non-equilibrium carrier concentration, and which can have surprising synergies when used as bidirectional switches for power-packet-switching power converters. BTRANs are driven into a state of high carrier concentration, making the on-state voltage drop very low.
1. A semiconductor device, comprising:
first-conductivity-type emitter regions on opposing faces of a second-conductivity-type semiconductor mass;
second-conductivity-type base contact regions on said opposing faces of said second-conductivity-type semiconductor mass;
a thin layer of tunnel oxide between each said first-conductivity-type emitter region and said second-conductivity-type semiconductor mass, and which forms a differential between holes and electrons;
drive circuitry which applies sufficient current to a a selected base contact region to generate a nonequilibrium carrier concentration, in the interior of said semiconductor mass, which is more than thirty times as great as the off-state equilibrium majority carrier concentration, to thereby lower the voltage drop across the second-conductivity-type semiconductor mass; and
oxide-filled trenches between each said first-conductivity-type emitter region and respectively adjacent second-conductivity-type base contact regions.
2. The semiconductor device of claim 1 , wherein, when the first-conductivity-type regions on one said face act as emitters, the first-conductivity-type regions on the opposing face act as collectors.
3. The semiconductor device of claim 1 , further comprising an edge termination structure; wherein said edge termination structure comprises a second-conductivity-type region which comprises a first-conductivity-type region.
4. The semiconductor device of claim 1 , wherein said semiconductor device is driven in a reduced beta mode.
5. A semiconductor device, comprising:
first-conductivity-type emitter regions on opposing faces of a second-conductivity-type semiconductor mass;
second-conductivity-type base contact regions on said opposing faces of said second-conductivity-type semiconductor mass;
a thin layer of tunnel oxide between each said first-conductivity-type emitter region and said second-conductivity-type semiconductor mass, and which forms a differential between holes and electrons;
drive circuitry which applies sufficient current to selected first and second base contact regions differently, on opposing faces of said semiconductor mass, to thereby permit current to flow between first and second emitter regions on said opposing faces of said semiconductor mass, and to generate a nonequilibrium carrier concentration, in the interior of said semiconductor mass, which is more than thirty times as great as the off-state equilibrium majority carrier concentration, to thereby lower the voltage drop across the second-conductivity-type semiconductor mass;
wherein said semiconductor device is driven in a regime of high carrier densities.
6. A semiconductor device, comprising:
first-conductivity-type emitter regions on opposing faces of a second-conductivity-type semiconductor mass;
second-conductivity-type base contact regions on said opposing faces of said second-conductivity-type semiconductor mass;
a thin layer of tunnel oxide between each said first-conductivity-type emitter region and said second conductivity-type semiconductor mass, and which forms a differential between holes and electrons;
drive circuitry which applies sufficient current to selected first and second base contact regions differently, on opposing faces of said semiconductor mass, to thereby permit current to flow between first and second emitter regions on said opposing faces of said semiconductor mass, and to generate a nonequilibrium carrier concentration, in the interior of said semiconductor mass, which is more than thirty times as great as the off-state equilibrium majority carrier concentration, to thereby lower the voltage drop across the second-conductivity-type semiconductor mass;
wherein said second-conductivity-type base contact regions are more highly doped than the rest of said second-conductivity-type base region.