Variable resistive memory device and method of fabricating the same
A variable resistive memory device includes an array of a plurality of memory cells. Each of the plurality of memory cells includes first and second electrodes, and an Sb m Se n material layer (where m and n are positive numbers, respectively) interposed between the first electrode and the second electrode. The Sb m Se n material layer includes a separation structure in which a plurality of Sb atoms are in contact with a plurality of Se atoms.
1. A variable resistive memory device, comprising:
an array of a plurality of memory cells,
wherein each of the plurality of memory cells includes:
first and second electrodes; and
a phase change material layer interposed between the first electrode and the second electrode,
wherein the phase change material layer includes a separation structure in which a first layer of a plurality of Sb atoms are in contact with a second layer of a plurality of Se atoms to form a contact interface therebetween, and
wherein the phase change material layer includes a phase of Sb 4 Se 4 monoclinic crystal structure.
2. The variable resistive memory device of claim 1 , wherein in the phase change material layer, a ratio m:n of the Sb atoms and the Se atoms satisfies m>n.
3. The variable resistive memory device of claim 1 , wherein in the phase change material layer, a ratio m:n of the Sb atoms and the Se atoms satisfies m=n.
4. The variable resistive memory device of claim 1 , further comprising a circuit configured to have a programming mode which applies a set pulse and a reset pulse to the array of the plurality of memory cells and applies a first set pulse for forming the phase of Sb 4 Se 4 monoclinic crystal structure to the phase change material layer.
5. The variable resistive memory device of claim 4 , wherein the circuit is configured to apply a second set pulse for forming an Sb 2 Se 3 orthorhombic crystal structure to the phase change material layer.
6. The variable resistive memory device of claim 4 , wherein the circuit is configured to apply the first and second set pulses to heat the phase change material layer to a range of 170° C. to 280° C.
7. The variable resistive memory device of claim 1 , wherein the first layer of the plurality of Sb atoms and the second layer of the plurality of Sb atoms are alternately stacked.
8. The variable resistive memory device of claim 1 , wherein the memory cell further includes an additional phase-change material layer between any one of the first and second electrodes and the phase change material layer.
9. The variable resistive memory device of claim 8 , wherein the additional phase-change material layer includes any one selected from the group consisting of Ge 2 Sb 2 Te 5 , In 0.5 Sb 2 Te 2.9 , Sb 2 Te 3 , Ge 7.5 Sb 92.5 , GeSb 2 Te 3 , GeSb 2 Te 4 , BiSe, GeTeAs, GeSnTe, SeSnTe, GaSeTe, GeTeSnAu, SeSb 2 , InSe, GeTe, BiSeSb, PdTeGeSn, InSeTiCo, InSbTe, In 3 SbTe 2 , GeTeSb 2 , GeTe 3 Sb, GeSbTePd, and AgInSbTe or a combination thereof.
10. A variable resistive memory device, comprising:
an array of a plurality of memory cells,
wherein each of the plurality of memory cells includes;
first and second electrodes; and
a phase change material layer interposed between the first electrode and the second electrode,
wherein the phase change material layer includes a separation structure in which a first layer of a plurality of Sb atoms are in contact with a second layer of a plurality of Se atoms to form contact interface therebetween, and
wherein first bit information is allocated to a first resistance value by an Sb 4 Se 4 monoclinic crystal structure generated by applying a first set pulse to the phase change material layer.
11. The variable resistive memory device of claim 10 , wherein second bit information is allocated to a second resistance value by an Sb 2 Se 3 orthorhombic crystal structure generated by applying a second set pulse to the phase change material layer.
12. The variable resistive memory device of claim 11 , wherein each of the memory cells further includes an additional phase-change material layer between any one of the first and second electrodes and the phase change material layer.
13. The variable resistive memory device of claim 12 , wherein the additional phase-change material layer includes any one selected from the group consisting of Ge 2 Sb 2 Te 5 , In 0.5 Sb 2 Te 2.9 , Sb 2 Te 3 , Ge 7.5 Sb 92.5 , GeSb 2 Te 3 , GeSb 2 Te 4 , BiSe, GeTeAs, GeSnTe, SeSnTe, GaSeTe, GeTeSnAu, SeSb 2 , InSe, GeTe, BiSeSb, PdTeGeSn, InSeTiCo, InSbTe, In 3 SbTe 2 , GeTeSb 2 , GeTe 3 Sb, GeSbTePd, and AgInSbTe or a combination thereof.
14. A method of manufacturing a variable resistive memory device, the method comprising:
forming a first electrode;
forming a phase change material layer on the first electrode; and
forming a second electrode on the phase change material layer,
wherein the phase change material layer includes a separation structure in which a first layer of a plurality of Sb atoms are in contact with a second layer of a plurality of Se atoms to form contact interface therebetween, and
wherein the phase change material layer includes a phase of Sb 4 Se 4 monoclinic crystal structure.
15. The method of claim 14 , wherein the Raffling a phase change material layer includes alternately stacking the first layer of the plurality of Sb atoms and the second layer of the plurality of Se atoms.
16. The method of claim 14 , wherein in the phase change material layer, a ratio m:n of the Sb atoms and the Se atoms satisfies min.
17. The method of claim 14 , wherein in the phase change material layer, a ratio m:n of the Sb atoms and the Se atoms satisfies m=n.
18. The method of claim 14 , wherein the forming a phase change material layer is performed by any one selected from the group consisting of an effusion cell method, a molecular beam epitaxy, and an atomic layer deposition or a combination thereof.