Flash memory device using adaptive program verification scheme and related method of operation
A method of programming a flash memory device comprises programming selected memory cells, performing a verification operation to determine whether the selected memory cells have reached a target program state, and determining a start point of the verification operation based on a programming characteristic associated with a detection of a pass bit during programming of an initial program state.
1. A method of programming a nonvolatile memory device, comprising:
applying a program voltage to selected memory cells;
performing a first verification operation for a first program state by applying a first verification voltage to the selected memory cells;
performing a second verification operation for a second program state by applying a second verification voltage to the selected memory cells;
performing a first fail-bit counting operation for a result of the first verification operation; and
selectively performing a second fail-bit counting operation for a result of the second verification operation based on a result of the first fail-bit counting operation,
wherein the second verification voltage is higher than the first verification voltage.
2. The method of claim 1 , wherein the second fail-bit counting operation is performed when the result of the first fail-bit counting operation is lower than a reference value, and the second fail-bit counting operation is not performed when the result of the first fail-bit counting operation is higher than the reference value.
3. The method of claim 2 , wherein the reference value has a same value for the first program state and the second program state.
4. The method of claim 1 , wherein the applying of the program voltage to the selected memory cells, the first verification operation, the second verification operation and the first fail-bit counting operation form a program loop which is repeated a plurality of times.
5. The method of claim 4 , wherein the first verification operation is omitted in next program loop when the result of the first fail-bit counting operation is lower than a reference value.
6. A method of programming a nonvolatile memory device, comprising:
applying a first program voltage to selected memory cells;
performing a first verification operation for a first program state by applying a first verification voltage to the selected memory cells;
applying a second program voltage to the selected memory cells; and
performing a first fail-bit counting operation for program fail-bits based on a result of the first verification operation during applying of the second program voltage to the selected memory cells.
7. The method of claim 6 , further comprising performing a second verification operation for a second program state by applying a second verification voltage which is higher than the first verification voltage to the selected memory cells.
8. The method of claim 7 , further comprising selectively performing a second fail-bit counting operation for a result of the second verification operation based on a result of the first fail-bit counting operation.
9. The method of claim 8 , wherein the second fail-bit counting operation is performed when the result of the first fail-bit counting operation is lower than a reference value, and the second fail-bit counting operation is not performed when the result of the first fail-bit counting operation is higher than the reference value.
10. The method of claim 7 , wherein the applying of the first program voltage to the selected memory cells, the first verification operation and the second verification operation form a program loop which is repeated a plurality of times.
11. The method of claim 10 , wherein the first verification operation is omitted in a next program loop when the result of the first fail-bit counting operation is lower than a reference value.
12. The method of claim 10 , wherein memory cells corresponding to the program fail-bits are program inhibited in a next program loop when a result of the first fail-bit counting operation is lower than a reference value.
13. The method of claim 11 , wherein the reference value has a same value for the first program state and the second program state.
14. The method of claim 12 , wherein the reference value has a same value for the first program state and the second program state.
15. The method of claim 11 , wherein the reference value has a different value for the first program state and the second program state.
16. The method of claim 12 , wherein the reference value has a different value for the first program state and the second program state.
17. The method of claim 6 , wherein the second program voltage is higher than the first program voltage.