Oversubscribing to a packet processing device to adjust power consumption
Embodiments are directed to saving power consumption in packet processing devices. A method for controlling power consumption of a packet processing device includes determining a power-save link utilization based upon one or more power-save enabled links of the packet processing device, determining an aggregate minimum processing bandwidth for the packet processing device based at least upon the determined power-save link utilization, and adjusting a processing capacity of the packet processing device based upon the determined aggregate minimum processing bandwidth, wherein the power consumption is changed by the adjusting. System and computer program product embodiments are also disclosed.
1. A method for controlling power consumption of a packet processing device, comprising:
determining a link utilization for one or more links coupled to the packet processing device;
determining an aggregate desired processing bandwidth for the packet processing device based upon the determined link utilization; and
adjusting a processing capacity of the packet processing device based upon the determined aggregate desired processing bandwidth by changing a clock rate of one or more processors of the packet processing device.
2. The method of claim 1 , wherein the determining the link utilization comprises:
determining the link utilization based upon a portion of a time interval in which the one or more links were in a low-power state.
3. A method for controlling power consumption of a packet processing device, comprising:
determining a power-save link utilization based upon one or more power-save enabled links coupled to the packet processing device;
determining an aggregate processing bandwidth for the packet processing device based upon the determined power-save link utilization; and
adjusting a processing capacity of the packet processing device based upon the determined aggregate processing bandwidth,
wherein the determining an aggregate processing bandwidth comprises:
determining an initial processing bandwidth based upon the power-save link utilization; and
updating the initial processing bandwidth based upon traffic associated with the one or more power-save enabled links to determine the aggregate processing bandwidth.
4. The method of claim 3 , wherein the updating the initial processing bandwidth comprises:
determining a first aggregate bandwidth for latency sensitive traffic associated with the one or more power-saving enabled links; and
increasing the initial processing bandwidth to include at least a portion of the first aggregate bandwidth.
5. The method of claim 3 , wherein the updating the initial processing bandwidth comprises:
determining a first aggregate bandwidth for latency sensitive traffic associated with the one or more power-saving enabled links;
determining a second aggregate bandwidth for non-latency sensitive traffic associated with the one or more power-saving enabled links; and
increasing the initial processing bandwidth to include the sum of at least a portion of the second aggregate bandwidth and at least a portion of the first aggregate bandwidth, wherein the included portion of the second aggregate bandwidth is different from the included portion of the first aggregate bandwidth.
6. The method of claim 5 , wherein the included portion of the first aggregate bandwidth is greater than the included portion of the second aggregate bandwidth.
7. The method of claim 5 , wherein the included portion of the first aggregate bandwidth is based upon a bandwidth of latency-sensitive packet streams incoming to the packet processing device.
8. The method of claim 7 , wherein the bandwidth is determined based upon historical analysis of the latency-sensitive packet streams.
9. The method of claim 5 , wherein the determining a first aggregate bandwidth for latency sensitive traffic, comprises:
determining the first aggregate bandwidth based upon a peak bandwidth of latency-sensitive packet streams incoming to the packet processing device.
10. The method of claim 3 , further comprising:
changing the aggregate processing bandwidth based upon one or more application requirements.
11. The method of claim 1 , wherein the adjusting the processing capacity of the packet processing device further comprises:
determining a difference in the aggregate desired processing bandwidth in relation to a previous point in time; and
determining a desired difference of the clock rate in proportion to the determined change in the aggregate desired processing bandwidth,
wherein the changing the clock rate is performed in accordance with the desired difference.
12. The method of claim 1 , wherein the adjusting the processing capacity of the packet processing device further comprises:
changing a quantity of active processors of the packet processing device.
13. The method of claim 12 , wherein the adjusting the processing capacity of the packet processing device further comprises:
determining a difference in the aggregate desired processing bandwidth in relation to a previous point in time; and
determining a desired difference of the quantity of active processors in proportion to the determined change in the aggregate desired processing bandwidth,
wherein the changing the quantity of active processors is performed in accordance with the desired difference.
14. The method of claim 1 , further comprising:
identifying at least one link of the one or more links of the packet processing device as not being power-save enabled, wherein the aggregate desired processing bandwidth is based further upon the identified at least one link operating at a link rate unaffected by power-saving changes.
15. A packet processing device, comprising:
one or more processors;
an aggregate desired bandwidth estimator configured to:
determine a link utilization for one or more links coupled to the packet processing device; and
determine an aggregate desired processing bandwidth for the packet processing device based upon the determined link utilization; and
a processing capacity adjuster configured to adjust a processing capacity of the packet processing device based upon the determined aggregate desired processing bandwidth by changing a clock rate of the one or more processors.
16. The packet processing device of claim 15 , wherein the aggregate desired bandwidth estimator is further configured to:
determine an initial processing bandwidth based upon the determined link utilization; and
update the initial processing bandwidth based upon traffic associated with the one or more links to determine the aggregate desired processing bandwidth.
17. The packet processing device of claim 16 , wherein the aggregate desired bandwidth estimator is further configured to:
determine the link utilization based upon a portion of a time interval in which one or more of the links were in a low-power state.
18. The packet processing device of claim 15 , wherein the processing capacity adjuster is further configured to:
determine a difference in the aggregate desired processing bandwidth in relation to a previous point in time; and
determine a desired difference of the clock rate in proportion to the determined change in the aggregate desired processing bandwidth,
wherein the changing the clock rate is performed in accordance with the desired difference.
19. A computer readable storage medium having instructions stored thereon, that when executed by a processor, causes the processor to perform a method to control power consumption of a packet processing device, the method comprising:
determining a link utilization for one or more links coupled to the packet processing device;
determining an aggregate desired processing bandwidth for the packet processing device based upon the determined link utilization; and
adjusting a processing capacity of the packet processing device based upon the determined aggregate desired processing bandwidth by changing a clock rate of one or more processors of the packet processing device.
20. The method of claim 1 , wherein the aggregate desired processing bandwidth comprises:
a bandwidth corresponding to a processing capacity at which the packet processing device can be oversubscribed while enabling latency sensitive traffic to meet latency requirements despite the oversubscription.