Method of manufacturing semiconductor device and semiconductor device
An object is to provide a semiconductor device having improved reliability by preventing, in forming a nonvolatile memory and MOSFETS on the same substrate, an increase in the size of grains in a gate electrode. The object can be achieved by forming the control gate electrode of the nonvolatile memory and the gate electrodes of the other MOSFETs from films of the same layer, respectively, and configuring each of the control gate electrode and the gate electrodes from a stack of two polysilicon film layers.
1. A semiconductor device, comprising:
a semiconductor substrate having, over the main surface thereof, a first region, a second region, and a third region;
a nonvolatile memory formed in the first region;
a first field effect transistor of a first conductivity type formed in the second region; and
a second field effect transistor of the first conductivity type formed in the third region and having a drive voltage lower than that of the first field effect transistor,
wherein the nonvolatile memory comprises:
a selective gate electrode having a first polysilicon film and a second polysilicon film stacked successively over the semiconductor substrate via a first insulating film; and
a memory gate electrode contiguous to the sidewall of the selective gate electrode and the main surface of the semiconductor substrate via a third insulating film formed by successively stacking a second insulating film and a charge storage film,
wherein the first field effect transistor has a first gate electrode including a third polysilicon film and a fourth polysilicon film stacked successively over the semiconductor substrate,
wherein the second field effect transistor has a second gate electrode including a fifth polysilicon film and a sixth polysilicon film stacked successively over the semiconductor substrate,
wherein the first polysilicon film, the third polysilicon film, and the fifth polysilicon film are films of the same layer, and
wherein the second polysilicon film, the fourth polysilicon film, and the sixth polysilicon film are films of the same layer.
2. The semiconductor device according to claim 1 ,
wherein the second gate electrode configures a portion of a third field effect transistor of a second conductivity type which is a conductivity type different from the first conductivity type.
3. The semiconductor device according to claim 2 ,
wherein the second field effect transistor and the third field effect transistor configure a SRAM,
wherein the second field effect transistor is a driver transistor, and
wherein the third field effect transistor is a load transistor.
4. The semiconductor device according to claim 2 ,
wherein the second field effect transistor and the third field effect transistor configure a CMOS inverter.
5. The semiconductor device according to claim 4 , further comprising:
a fourth field effect transistor in a fourth region over the semiconductor substrate,
wherein a third gate electrode configuring the fourth field effect transistor includes at least a seventh polysilicon film of the same layer as that of the first polysilicon film and an eighth polysilicon film of the same layer as the second polysilicon film formed over the seventh polysilicon film, and
wherein the third gate electrode does not configure a portion of a field effect transistor having a conductivity type different from that of the fourth field effect transistor.
6. The semiconductor device according to claim 1 ,
wherein the charge storage film is a silicon nitride film.
7. The semiconductor device according to claim 1 , wherein the thickness of the first polysilicon film, the thickness of the third polysilicon film, and the thickness of the fifth polysilicon film are smaller than the thickness of the second polysilicon film, the thickness of the fourth polysilicon film, and the thickness of the sixth polysilicon film, respectively.