IP Library Granted Patent US 9,098,445
Granted Patent B2
US 9,098,445 · App. 13/826,203 · Granted Aug 4, 2015

Selection of redundant storage configuration based on available memory space

Inventors: Avraham Poza Meir (Rishon Le-Zion, IL); Oren Golov (Hod-Hasharon, IL); Sasha Paley (Kfar-Saba, IL); Ori Moshe Stern (Modi'in, IL); Etai Zaltsman (Ramat-Hasaron, IL)
Assignee: Apple Inc.
G06F11/1412G06F3/064G06F3/0619G06F3/0688G06F11/10G06F11/108G06F11/1048
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Quick Facts
Patent No.
US 9,098,445
App. No.
13/826,203
Granted
Aug 4, 2015
Kind
B2
Abstract

A method includes, in a memory controller that controls a memory, evaluating an available memory space remaining in the memory to write data. A redundant storage configuration is selected in the memory controller depending on the available memory space. Redundancy information is calculated over the data using the selected redundant storage configuration. The data and the redundancy information are written to the available memory space in the memory.

Claims (36)

1. A method, comprising:

in a memory controller that controls a memory, evaluating an available memory space remaining in the memory to write data;

selecting in the memory controller a redundant storage configuration depending on the available memory space;

calculating redundancy information over the data using the selected redundant storage configuration; and

writing the data and the redundancy information to the available memory space in the memory;

wherein selecting the redundant storage configuration includes switching from a first storage configuration that protects against failure of one or more entire memory blocks to a second storage configuration that protects against failure of only portions of the memory blocks in response to determining a programming operation has completed; and

wherein switching from the first to the second storage configuration includes replacing a first redundancy block with a second redundancy block during a compaction operation, wherein the first redundancy block is generated using the first storage configuration and the second redundancy block is generated using the second storage configuration.

2. The method according to claim 1 , wherein selecting the redundant storage configuration comprises choosing, based on the available memory space, a number of memory blocks over which the redundancy information is calculated.

3. The method according to claim 1 , wherein selecting the redundant storage configuration comprises choosing an Error Correction Code (ECC) having a code rate that depends on the available memory space, and wherein calculating the redundancy information comprises computing the redundancy information using the chosen ECC.

4. The method according to claim 1 , wherein selecting the redundant storage configuration comprises reassigning one or more memory blocks from storing a part of the redundancy information to storing a portion of the data.

5. The method according to claim 1 , wherein selecting the redundant storage configuration comprises modifying the redundant storage configuration upon detecting that the available memory space is below a predefined threshold.

6. An apparatus, comprising:

a memory; and

a memory controller configured to:

evaluate an available memory space remaining in the memory to write data;

select a redundant storage configuration depending on the available memory space;

calculate redundancy information over the data using the selected redundant storage configuration; and

write the data and the redundancy information to the available memory space in the memory;

wherein to select the redundant storage configuration, the memory controller is further configured to switch from a first storage configuration that protects against failure of one or more entire memory blocks to a second storage configuration that protects against failure of only portions of the memory blocks in response to a determination that a programming operation has completed; and

wherein to switch from the first to the second storage configuration, the memory controller is further configured to replace a first redundancy block with a second redundancy block during a compaction operation, wherein the first redundancy block is generated using the first storage configuration and the second redundancy block is generated using the second storage configuration.

7. The apparatus according to claim 6 , wherein the memory controller is configured to choose, based on the available memory space, a number of memory blocks over which the redundancy information is calculated.

8. The apparatus according to claim 6 , wherein the memory controller is configured to choose an Error Correction Code (ECC) having a code rate that depends on the available memory space, and to calculate the redundancy information using the chosen ECC.

9. The apparatus according to claim 6 , wherein the memory controller is configured to reassign one or more memory blocks from storing a part of the redundancy information to storing a portion of the data.

10. The apparatus according to claim 6 , wherein the memory controller is configured to modify the redundant storage configuration upon detecting that the available memory space is below a predefined threshold.

11. A memory controller, comprising:

an interface for communicating with a memory; and

a processor configured to:

evaluate an available memory space remaining in the memory to write data;

select a redundant storage configuration depending on the available memory space;

calculate redundancy information over the data using the selected redundant storage configuration; and

write the data and the redundancy information to the available memory space in the memory;

wherein to select the redundant storage configuration, the processor is further configured to switch from a first storage configuration that protects against failure of one or more entire memory blocks to a second storage configuration that protects against failure of only portions of the memory blocks in response to a determination that a programming operation has completed; and

wherein to switch from the first to the second storage configuration, the processor is further configured to replace a first redundancy block with a second redundancy block during a compaction operation, wherein the first redundancy block is generated using the first storage configuration and the second redundancy block is generated using the second storage configuration.

12. The memory controller according to claim 11 , wherein the processor is configured to choose, based on the available memory space, a number of memory blocks over which the redundancy information is calculated.

13. The memory controller according to claim 11 , wherein the processor is configured to reassign one or more memory blocks from storing a part of the redundancy information to storing a portion of the data.

14. The memory controller according to claim 11 , wherein the processor is configured to modify the redundant storage configuration upon detecting that the available memory space is below a predefined threshold.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 13, 2013
From: MEIR, AVRAHAM POZA; GOLOV, OREN; PALEY, SASHA; STERN, ORI MOSHE; ZALTSMAN, ETAI
To: APPLE INC.
Reel/Frame 030400/0048 →
Continuity (1)
Related Publication 20140281801A1 · Sep 18, 2014