IP Library Granted Patent US 9,116,532
Granted Patent B2
US 9,116,532 · App. 13/829,418 · Granted Aug 25, 2015

Power semiconductor device module

Inventor: Osamu Usui (Tokyo, JP)
Assignee: Mitsubishi Electric Corporation
G05F1/10H01L24/34H01L2224/48091H01L2224/48247H01L2224/48472H01L2924/1305H01L2924/13055
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Quick Facts
Patent No.
US 9,116,532
App. No.
13/829,418
Granted
Aug 25, 2015
Kind
B2
Abstract

A power semiconductor device module includes a plurality of inverters, each having a first transistor and a second transistor that are interposed in series between a first potential and a second potential and that operate complementarily. The plurality of inverters are assembled into a module. Only one predetermined inverter of the plurality of inverters is configured to detect temperatures of the first and second transistors, and control terminals for detection of the temperatures of the first and second transistors protrude from sides of the module.

Claims (15)

1. A power semiconductor device module comprising:

a plurality of inverters, each having a first transistor and a second transistor, said first and second transistors being interposed in series between a first potential and a second potential and operating complementarily, and said plurality of inverters being assembled into a module, wherein

only one predetermined inverter of said plurality of inverters is configured to detect temperatures of said first and second transistors, and control terminals for detection of the temperatures of said first and second transistors protrude from sides of the module, and wherein

a first terminal and a second terminal protrude outwardly from a side of the module so as to be adjacent and close to each other, said first terminal providing said first potential to a set of said first transistors and being shared therebetween, said second terminal providing said second potential to a set of said second transistors and being shared therebetween.

2. The power semiconductor device module according to claim 1 , wherein

said plurality of inverters share a common output terminal,

said first transistors in a set serving as a side of said first potential operate in a common manner,

said second transistors in a set serving as a side of said second potential operate in a common manner, and

the set of said first transistors and the set of said second transistors operate complementarily.

3. The power semiconductor device module according to claim 1 , wherein

said first and second terminals protrude outwardly from a side of the module from which control terminal groups of said second transistors serving as a side of said second potential protrude, and

said second terminal protrudes from a location of said side of the module adjacent to said control terminal groups.

4. The power semiconductor device module according to claim 1 , wherein

said first and second terminals protrude outwardly from a side in a direction differing by 90 degrees from a first side of the module from which first control terminal groups of said first transistors serving as a side of said first potential protrude, and from a second side of the module from which second control terminal groups of said second transistors serving as a side of said second potential protrude.

5. The power semiconductor device module according to claim 1 , wherein said one predetermined inverter is one of said plurality of inverters that includes a first and a second transistor which have the highest possibility of increasing in temperature upon operation.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 14, 2013
From: USUI, OSAMU
To: MITSUBISHI ELECTRIC CORPORATION
Reel/Frame 030004/0741 →
Priority Claims (1)
JP 2012-172464 · Aug 3, 2012 · national
Continuity (1)
Related Publication 20140035658A1 · Feb 6, 2014