IP Library Granted Patent US 9,124,178
Granted Patent B2
US 9,124,178 · App. 13/865,863 · Granted Sep 1, 2015

Method and apparatus for dynamic capacitor charging

Inventor: Eran Ofek (Modiin, IL)
Assignee: Strategic Patent Management, LLC
H02M7/219H02M3/07H02M1/4233H02M2001/0035H02M2001/0048Y02B70/126Y02B70/1441Y02B70/1491Y02B70/16
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Quick Facts
Patent No.
US 9,124,178
App. No.
13/865,863
Granted
Sep 1, 2015
Kind
B2
Abstract

A power converter and a method of operation thereof is disclosed including an input, an output, a sensor unit, a switched power converter, and a processor module. The power converter may convert an input power into an output power. The power converter may sense real-time measurements of the input power and the output power to determine a real-time calculated efficiency. The power converter may chop the input power into sized and positioned portions of the input power based on a plurality of determined operating parameters. The power converter may determine the operating parameters based on the real-time calculated efficiency and on a plurality of other operating factors/conditions.

Claims (33)

1. An apparatus configured for energy transfer from an input to an output, the apparatus comprising:

at least a first capacitor, a second capacitor, and a third capacitor, wherein the third capacitor is coupled to the output; and

a first plurality of switches including a first switch, a second switch, a third switch, a fourth switch, and a fifth switch; and

a processing module configured to control the plurality of switches;

wherein a first terminal of the first capacitor is coupled to a first terminal of the third capacitor through the first switch, a second terminal of the first capacitor is coupled to a second terminal of the third capacitor through the second switch, a first terminal of the second capacitor is coupled to the first terminal of the third capacitor through the third switch, a second terminal of the second capacitor is coupled to the second terminal of the third capacitor through the fourth switch, and the second terminal of the first capacitor is coupled to the first terminal of the second capacitor through the fifth switch; and

further wherein the processing module is configured to, on a condition that an amplitude of a voltage at the input is low in comparison to a voltage at the output, control the first plurality of switches to charge the third capacitor directly from the input without first charging the first capacitor and the second capacitor.

2. The apparatus of claim 1 , further comprising:

a second plurality of switches comprising a sixth switch, a seventh switch, an eighth switch, and a ninth switch, wherein the second plurality of switches are coupled between the input and the first plurality of switches, and further wherein the second plurality of switches are configured to rectify the voltage at the input; and

wherein the processing module is further configured to control the second plurality of switches based on respective capacitance values of the first capacitor, the second capacitor, and the third capacitor.

3. The apparatus of claim 1 , wherein the processing module is further configured to control the first plurality of switches to charge at least one of the first capacitor and the second capacitor for a length of time that corresponds to a voltage charged up on the at least one of the first capacitor and the second capacitor to be less than a level of a voltage applied to the at least one of the first capacitor and the second capacitor.

4. The apparatus of claim 3 , wherein the processing module is further configured to control the first plurality of switches to charge the first capacitor to a first portion of the applied voltage, and to control the plurality of switches to charge the second capacitor to a remaining portion of the applied voltage, wherein the remaining portion is the applied voltage less the first portion.

5. The apparatus of claim 1 , wherein the processing module is further configured to, on a first condition, control the first plurality of switches to discharge the first capacitor and the second capacitor sequentially to spread out the discharging of stored energy of the first capacitor and the second capacitor over time, and on a second condition, control the first plurality of switches to discharge the first capacitor and the second capacitor simultaneously.

6. The apparatus of claim 1 , wherein the processing module is further configured to control the first plurality of switches to charge the third capacitor from at least one of the first capacitor and the second capacitor on a condition that the voltage at the input is not sufficient to charge the third capacitor.

7. The apparatus of claim 3 , wherein the processing module is further configured to control the first plurality of switches to prevent the voltage charged up on the at least one of the first capacitor and the second capacitor to reach saturation.

8. The apparatus of claim 1 , wherein the processing module is further configured to control the first plurality of switches to charge the third capacitor based on predicted load demands, wherein the predicted loads demands are estimated based on a trend of observed load conditions.

9. The apparatus of claim 1 , wherein the processing module is further configured to control the first plurality of switches to discharge the first capacitor or the second capacitor into the third capacitor on a condition a stored energy level of the third capacitor is below a threshold.

10. The apparatus of claim 9 , wherein the processing module is further configured to control the first plurality of switches to discharge the first capacitor or the second capacitor into the third capacitor on a condition that the voltage across the third capacitor is less than a desired output voltage level.

11. A method for controlling energy transfer from an input to an output, the method comprising:

controlling a first plurality of switches to transfer energy from at least one of a first capacitor and a second capacitor to a third capacitor, wherein on a condition that an amplitude of a voltage at the input is low in comparison to a voltage at the output, the controlling further includes controlling the first plurality of switches to charge the third capacitor directly from the input without first charging the first capacitor and the second capacitor;

wherein the first plurality of switches includes a first switch, a second switch, a third switch, a fourth switch, and a fifth switch, and further wherein a first terminal of the first capacitor is coupled to a first terminal of the third capacitor through the first switch, a second terminal of the first capacitor is coupled to a second terminal of the third capacitor through the second switch, a first terminal of the second capacitor is coupled to the first terminal of the third capacitor through the third switch, a second terminal of the second capacitor is coupled to the second terminal of the third capacitor through the fourth switch, and the second terminal of the first capacitor is coupled to the first terminal of the second capacitor energy storage device through the fifth switch.

12. The method of claim 11 , further comprising:

controlling a second plurality of switches based on respective capacitance values of the first capacitor, the second capacitor, and the third capacitor:

wherein the second plurality of switches comprise a sixth switch, a seventh switch, an eighth switch, and a ninth switch, wherein the second plurality of switches are coupled between the input and the first plurality of switches, and further wherein the second plurality of switches are configured to rectify the voltage at the input.

13. The method of claim 11 , further comprising controlling the first plurality of switches to charge at least one of the first capacitor and the second capacitor for a length of time that corresponds to a voltage charged up on the at least one of the first capacitor and the second capacitor to be less than a level of a voltage applied to the at least one of the first capacitor and the second capacitor.

14. The method of claim 13 , further comprising controlling the first plurality of switches to charge the first capacitor to a first portion of the applied voltage, and controlling the plurality of switches to charge the second capacitor to a remaining portion of the applied voltage, wherein the remaining portion is the applied voltage less the first portion.

15. The method of claim 11 , further comprising:

on a first condition, controlling the plurality of switches to discharge the first capacitor and the second capacitor sequentially to spread out the discharging of stored energy of the first capacitor and the second capacitor over time; and

on a second condition, controlling the first plurality of switches to discharge the first capacitor and the second capacitor simultaneously.

16. The method of claim 11 , further comprising controlling the first plurality of switches to charge the third capacitor from at least one of the first capacitor and the second capacitor on a condition that the voltage at the input is not sufficient to charge the third capacitor.

17. The method of claim 13 , further comprising controlling the first plurality of switches to prevent the voltage charged up on the at least one of the first capacitor and the second capacitor to reach saturation.

18. The method of claim 11 , further comprising controlling the first plurality of switches to charge the third capacitor based on predicted load demands, wherein the predicted loads demands are estimated based on a trend of observed load conditions.

19. The method of claim 11 , further comprising controlling the first plurality of switches to discharge the first capacitor or the second capacitor into the third capacitor on a condition a stored energy level of the third capacitor is below a threshold.

20. The method of claim 19 , further comprising controlling the first plurality of switches to discharge the first capacitor or the second capacitor into the third capacitor on a condition that the voltage across the third capacitor is less than a desired output voltage level.

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 23, 2017
From: STRATEGIC PATENT MANAGEMENT, LLC
To: VOLPE AND KOENIG, P.C.
Reel/Frame 042799/0435 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 13, 2017
From: OFEK, ERAN
To: NEY-LI PTE. LTD.
Reel/Frame 042000/0330 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 24, 2014
From: NEY-LI PTE. LTD.
To: STRATEGIC PATENT MANAGEMENT, LLC
Reel/Frame 032750/0873 →
Continuity (4)
Continuation 13538230 · Jun 29, 2012
Provisional Application 61625902 · Apr 18, 2012
Provisional Application 61665766 · Jun 28, 2012
Related Publication 20130279224A1 · Oct 24, 2013