Systems, apparatuses, and methods for performing rotate and XOR in response to a single instruction
Disclosed herein are systems, apparatuses, and methods performing in a computer processor of performing a rotate and XOR in response to a single XOR and rotate instruction, wherein the rotate and XOR instruction includes a first and second source operand, a destination operand, and an immediate value.
1. A method of performing in a computer processor of performing an rotate and XOR in response to a single XOR and rotate instruction, wherein the rotate and XOR instruction includes a first and second source operand, a destination operand, an opcode, and an immediate value, the method comprising steps of:
executing the single rotate and XOR instruction to perform one of a first and second mode, wherein in the first mode executing causes XORing values of the first and second source operands to generate an XORed value and then rotating the XORed value by X number of bit positions, and in the second mode executing causes rotating a value of the first source operand by X number of bit positions and XORing the rotated value with a value from the second source operand; and
storing a result from either the first or second mode into a destination location associated with the destination operand.
2. The method of claim 1 , wherein the X bit positions is a decimal value of one or more bits of the immediate.
3. The method of claim 2 , wherein the one or more bits of the immediate are the six least significant bits of the immediate.
4. The method of claim 1 , wherein the rotating is a left rotate.
5. The method of claim 1 , wherein the XOR and rotate instruction is a part of a Skein hashing algorithm.
6. The method of claim 1 , wherein the XOR and rotate instruction is a part of a Blake hashing algorithm.
7. The method of claim 1 , wherein the first and second source operands are each associated with a register and the register sizes are one of 8-bit, 16-bit, 32-bit, or 64-bit.
8. The method of claim 1 , further comprising:
determining which of the first and second modes is to be performed based upon a value of a bit of the immediate.
9. An article of manufacture comprising:
a tangible machine-readable storage medium having stored thereon an occurrence of an instruction, wherein the instruction's format specifies a first and a second source operand, a destination operand, an immediate, and an opcode, wherein the opcode instructs a machine, responsive to the single occurrence of the single instruction, to execute the single rotate and XOR instruction to perform one of a first and second mode, wherein in the first mode to execute causes XORing values of the first and second source operands to generate an XORed value and then rotate the XORed value by X number of bit positions, and in the second mode to execute causes rotating a value of the first source operand by X number of bit positions and XORing the rotated value with a value from the second source operand; and store a result from either the first or second mode into a destination location associated with the destination operand.
10. The article of manufacture of claim 9 , wherein the X bit positions is a decimal value of one or more bits of the immediate.
11. The article of manufacture of claim 10 , wherein the one or more bits of the immediate are the six least significant bits of the immediate.
12. The article of manufacture of claim 9 , wherein the rotating is a left rotate.
13. The article of manufacture of claim 9 , wherein the instruction is a part of a Skein hashing algorithm.
14. The article of manufacture of claim 9 , wherein the instruction is a part of a Blake hashing algorithm.
15. The article of manufacture of claim 9 , wherein the first and second source operands are each associated with a register and the register sizes are one of 8-bit, 16-bit, 32-bit, or 64-bit.
16. The article of manufacture of claim 9 , wherein the opcode further instructs the machine to determine which of the first and second modes is to be performed based upon a value of a bit of the immediate.
17. An apparatus comprising;
a hardware decoder to decode single XOR and rotate instruction, wherein the rotate and XOR instruction includes a first and second source operand, a destination operand, an opcode, and an immediate value; and
execution logic to execute one of a first and second mode, wherein in the first mode executing causes XORing values of the first and second source operands to generate an XORed value and then rotating the XORed value by X number of bit positions, and in the second mode executing causes rotating a value of the first source operand by X number of bit positions and XORing the rotated value with a value from the second source operand; and store a result from either the first or second mode into a destination location associated with the destination operand.
18. The apparatus of claim 17 , wherein the X bit positions is a decimal value of one or more bits of the immediate.
19. The apparatus of claim 18 , wherein the one or more bits of the immediate are the six least significant bits of the immediate.
20. The method of claim 1 , wherein the rotating is a left rotate.