Structure and method for the fabrication of a gallium nitride vertical cavity surface emitting laser
A III-Nitride based Vertical Cavity Surface Emitting Laser (VCSEL), wherein a cavity length of the VCSEL is controlled by etching.
1. A III-Nitride based Vertical Cavity Surface Emitting Laser (VCSEL), comprising a cavity length controlled by etching, wherein an Aluminum (Al) containing layer in the VCSEL's epitaxial structure is used as an etch stop layer for the etching.
2. The VCSEL of claim 1 , wherein the etching is carried out by photoelectrochemical etching.
3. The VCSEL of claim 1 , wherein an Indium (In) containing layer in the VCSEL's epitaxial structure is used as a sacrificial layer for the VCSEL's substrate removal by the etching.
4. The VCSEL of claim 3 , wherein the etching is carried out by photoelectrochemical etching.
5. The VCSEL of claim 1 , wherein the VCSEL is a nonpolar III-nitride VCSEL.
6. The VCSEL of claim 1 , wherein the VCSEL is grown on a nonpolar or semipolar substrate.
7. The VCSEL of claim 1 , wherein a longitudinal mode of the VCSEL is a single mode.
8. The VCSEL of claim 1 , wherein the cavity length is controlled after at least partially removing a substrate on which the VCSEL is grown.
9. The VCSEL of claim 1 , wherein the VCSEL is a semipolar III-nitride VCSEL.
10. The VCSEL of claim 1 , wherein the VCSEL is grown on a semipolar gallium nitride substrate.
11. The VCSEL of claim 1 , wherein the VCSEL is grown on a nonpolar gallium nitride substrate.
12. A method of fabricating a III-nitride based Vertical Cavity Surface Emitting Laser (VCSEL), comprising
providing or fabricating a III-nitride VCSEL structure grown on a III-nitride substrate, the III-nitride VCSEL, structure comprising an etch stop layer below an active region;
fabrication a first cavity mirror for the VCSEL on a first side of the VCSEL structure;
attaching the VCSEL structure, at the first cavity mirror, to a submount;
etching down to the etch stop layer to control or define a cavity length of the VCSEL; and
fabricating a second cavity mirror for the VCSEL on the second side of the VCSEL, wherein the first cavity mirror and the second cavity mirror define the VCSEL's laser cavity having the cavity length.
13. The method of claim 12 , wherein:
the VCSEL structure comprises one or more sacrificial layers containing indium below the active region,
the method further comprises laterally photoelectrochemically etching the sacrificial layers, and
the etch stop layer comprises aluminum.
14. The method of claim 12 , wherein the controlling or defining the cavity length of the VCSEL by etching is after at least partially removing the III-nitride substrate on which the VCSEL is grown.
15. The method of claim 12 , wherein the III-nitride VCSEL structure is a semipolar III-nitride VCSEL structure grown on a semipolar surface of the III-nitride substrate.
16. The method of claim 12 , wherein the III-nitride VCSEL structure is a nonpolar III-nitride VCSEL structure grown on a nonpolar surface of the III-nitride substrate.
17. The method of claim 12 , wherein the cavity length is such that the III-nitride VCSEL has single longitudinal mode operation.
18. A method of fabricating a III-nitride based Vertical Cavity Surface Emitting Laser (VCSEL), comprising:
obtaining or growing epitaxial layers on a nonpolar or semipolar surface of a III-nitride substrate to form a VCSEL structure, the VCSEL structure comprising:
an active region;
an aluminum containing etch stop layer placed between the active region and the substrate to define the VCSEL's cavity length;
a p-type GaN layer, wherein the active region is between the p-type GaN layer and the aluminum containing etch stop layer;
an n-type GaN layer that is part of the substrate or between the substrate and the aluminum containing etch stop layer;
etching a mesa through the active region but stopping above the etch stop layer, to form a top surface of the epitaxial layers;
coating the top surface of the wafer with dielectric material;
etching an aperture in the dielectric material;
patterning and depositing a transparent conductive layer on the dielectric material and in the aperture to contact the p-type GaN in the aperture;
patterning and depositing metal on the transparent conductive layer, wherein the metal does not extend into the aperture;
depositing and patterning a first dielectric Distributed Bragg Reflector (DBR) on the metal;
depositing pad metal on the first dielectric DBR, wherein:
(i) the pad metal makes n-type contact in a field around the first dielectric DBR to protect the first dielectric DBR during a subsequent etch,
(ii) the pad metal coats a top of the first dielectric DBR for bonding to a submount in a subsequent flip-chip bonding process, and
(iii) the pad metal is continuous from the top of the first dielectric DBR to the transparent conductive layer to inject current from the submount to the transparent conductive layer;
flip-chip bonding the submount to the top of the first dielectric DBR using the pad metal;
patterning and depositing a metal n-contact on the n-type GaN layer;
selectively etching down to the aluminum containing etch stop layer; and
depositing a second dielectric DBR on the aluminum containing stop etch layer and the metal n-type contact, wherein light from the VCSEL is emitted through the second dielectric DBR.
19. The method of claim 18 , wherein the epitaxial layers comprise an Indium (In) containing sacrificial layer between the substrate and the aluminum containing etch stop layer, the method further comprising at least partially removing the substrate by laterally photoelectrochemically (PEC) etching the substrate down to the In containing sacrificial layer.
20. The method of claim 18 , wherein the aluminum containing etch stop layer is positioned to define the cavity length such that the VCSEL has single mode operation or the cavity length is 3 micrometers or less.