IP Library Granted Patent US 9,159,813
Granted Patent B2
US 9,159,813 · App. 13/898,982 · Granted Oct 13, 2015

Nonvolatile semiconductor memory transistor and method for manufacturing nonvolatile semiconductor memory

Inventors: Fujio Masuoka (Chuo-ku, JP); Hiroki Nakamura (Chuo-ku, JP)
Assignee: UNISANTIS ELECTRONICS SINGAPORE PTE LTD.
H01L29/66825H01L21/28273H01L27/11521H01L29/7889
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Quick Facts
Patent No.
US 9,159,813
App. No.
13/898,982
Granted
Oct 13, 2015
Kind
B2
Abstract

A nonvolatile semiconductor memory transistor includes an island-shaped semiconductor having a source region, a channel region, and a drain region formed in this order from the silicon substrate side, a floating gate arranged so as to surround the outer periphery of the channel region with a tunnel insulating film interposed between the floating gate and the channel region, a control gate arranged so as to surround the outer periphery of the floating gate with an inter-polysilicon insulating film interposed between the control gate and the floating gate, and a control gate line electrically connected to the control gate and extending in a predetermined direction. The inter-polysilicon insulating film is arranged so as to be interposed between the floating gate and the lower and inner side surfaces of the control gate and between the floating gate and the lower surface of the control gate line.

Claims (8)

1. A method for manufacturing a nonvolatile semiconductor memory including a floating gate arranged so as to surround an outer periphery of an island-shaped semiconductor with a tunnel insulating film interposed between the floating gate and the island-shaped semiconductor, a control gate arranged so as to surround an outer periphery of the floating gate with an inter-polysilicon insulating film interposed between the control gate and the floating gate, and a control gate line electrically connected to the control gate and extending in a predetermined direction, the method comprising:

a step of forming a plurality of island-shaped semiconductors on a source line formed at a predetermined position on a substrate;

a step of forming an insulating film between the plurality of island-shaped semiconductors that are adjacent to each other and on the source line;

a step of forming a floating gate film by depositing a conductive material on the insulating film;

a step of forming a resist on the floating gate film, the resist having a groove extending in a direction perpendicular to the predetermined direction in which the control gate line extends;

a step of forming the floating gate for each of the plurality of island-shaped semiconductors using the resist by separating the floating gate film from a portion that is a lower region of the groove and that is on the insulating film by etching;

a step of forming the control gate for each of the plurality of island-shaped semiconductors, above two floating gates of adjacent island-shaped semiconductors among the plurality of island-shaped semiconductors, so as to surround the outer periphery of the island-shaped semiconductor; and

a step of forming the control gate line to connect the control gates of adjacent island-shaped semiconductors among the plurality of island-shaped semiconductors.

Priority Claims (1)
JP 2010-168148 · Jul 27, 2010 · national
Continuity (3)
Division 13163319 · Jun 17, 2011
Provisional Application 61367903 · Jul 27, 2010
Related Publication 20130252389A1 · Sep 26, 2013