IP Library Granted Patent US 9,183,939
Granted Patent B2
US 9,183,939 · App. 14/242,332 · Granted Nov 10, 2015

Nonvolatile memory device, a memory system having the same, and a read method thereof, the read method applying a read pass voltage to a selected wordline after a sensing

Inventors: Sang-Wan Nam (Hwaseong-si, KR); Kitae Park (Seongnam-si, KR); Hyun-Wook Park (Hwaseong-si, KR); Jae-Kyun Rhee (Hwaseong-si, KR)
Assignee: SAMSUNG ELECTRONICS CO., LTD.
G11C16/26G11C11/5628G11C16/0483G11C16/3427
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Quick Facts
Patent No.
US 9,183,939
App. No.
14/242,332
Granted
Nov 10, 2015
Kind
B2
Abstract

A method of reading a nonvolatile memory device including: applying a read voltage to a selected wordline of the nonvolatile memory device; applying a read pass voltage to unselected wordlines of the nonvolatile memory device; sensing a state of a memory cell connected to the selected wordline; and applying the read pass voltage to the selected wordline after the sensing.

Claims (49)

1. A method of reading a nonvolatile memory device which includes at least one string connected to a bit line, the at least one string including a plurality of memory cells connected in series, each of the plurality of memory cells being connected to respective word line of a plurality of word lines and stacked in a direction perpendicular to a substrate, comprising:

applying a read voltage to a selected wordline of the nonvolatile memory device;

applying a read pass voltage to unselected wordlines of the nonvolatile memory device;

sensing a state of a memory cell connected to the selected wordline;

applying the read pass voltage to the selected wordline after the sensing; and

discharging the read pass voltage of at least one of the unselected wordlines while the read pass voltage is applied to the selected wordline.

2. The method of claim 1 , further comprising discharging the read pass voltages of the selected wordline and the unselected wordlines.

3. The method of claim 1 , wherein the read voltage includes a first voltage and a second voltage, and the second voltage has a level between the first voltage and the read pass voltage.

4. The method of claim 1 , wherein a voltage of the unselected wordlines disposed between the selected wordline and a string selection line of the nonvolatile memory device begins to be discharged while the read pass voltage is applied to the selected wordline.

5. The method of claim 4 , wherein a voltage of the unselected wordlines disposed between the selected wordline and a ground selection line of the nonvolatile memory device begins to be discharged after the read pass voltage is applied to the selected wordline.

6. The method of claim 1 , wherein the unselected wordlines disposed between the selected wordline and a string selection line of the nonvolatile memory device include a first wordline group and a second wordline group, and a voltage of the first wordline group and a voltage of the second wordline group are sequentially discharged.

7. The method of claim 6 , wherein the voltage of the first wordline group and the voltage of the second wordline group are different from each other.

8. The method of claim 1 , further comprising discharging voltages of a selected string selection line or a selected ground selection line of the nonvolatile memory device.

9. The method of claim 1 , further comprising:

applying the read pass voltage to an unselected string selection line of the nonvolatile memory device after the sensing; and

discharging the read pass voltage of the unselected string selection line.

10. The method of claim 1 , further comprising:

applying the read pass voltage to an unselected string selection line of the nonvolatile memory device before the sensing; and

discharging the read pass voltage of the unselected string selection line.

11. The method of claim 1 , further comprising:

applying the read pass voltage to the selected wordline before the sensing; and

discharging the read pass voltage of the selected wordline before the sensing.

12. A method of reading a nonvolatile memory device which includes at least one string connected to a bit line, the at least one string including a plurality of memory cells connected in series, each of the plurality of memory cells being connected to a respective word line of a plurality of word lines and stacked in a direction perpendicular to a substrate, comprising:

applying a read voltage to a selected wordline of the nonvolatile memory device;

applying a read pass voltage to unselected wordlines of the nonvolatile memory device;

sensing a state of a memory cell connected to the selected wordline;

applying a turn-on voltage to the selected wordline after the sensing; and

discharging the read pass voltage of at least one of the unselected wordlines while the turn-on voltage is applied to the selected wordline.

13. The method of claim 12 , wherein a plurality of different read pass voltages are applied the unselected wordlines.

14. The method of claim 13 , further comprising discharging the voltages of the unselected wordlines and the selected wordline, wherein the voltages of the unselected wordlines are sequentially discharged.

15. The method of claim 12 , wherein the turn-on voltage is higher than the read voltage and lower than the read pass voltage.

16. A method of reading a nonvolatile memory device which includes at least one string connected to a bit line, the at least one string including a plurality of memory cells connected in series, each of the plurality of memory cells being connected to a respective word line of a plurality of word lines and stacked in a direction perpendicular to a substrate, comprising:

applying a read voltage to a selected wordline of the nonvolatile memory device;

applying a read pass voltage to unselected wordlines of the nonvolatile memory device;

sensing a state of a memory cell connected to the selected wordline; and

applying a turn-on voltage to the selected wordline after the sensing and while the read pass voltage is applied to the unselected wordlines,

wherein a voltage of the unselected wordlines disposed between the selected wordline and a string selection line of the nonvolatile memory device is discharging while the turn-on voltage is applied to the selected wordline.

17. The method of claim 16 , wherein the turn-on voltage is applied to the selected wordline according to health information of the nonvolatile memory device.

18. The method of claim 17 , wherein the health information includes a level of deterioration of memory cells, program/erase cycling information, wear-leveling information, or a number of errors detected by error checking and correction.

19. The method of claim 16 , wherein the turn-on voltage is applied to the selected wordline when a program/erase cycle value of a read requested memory block is larger than a predetermined value.

20. The method of claim 16 , wherein the unselected wordlines are arranged in a plurality of zones and voltages of the zones are sequentially discharged from a zone near the string selection line to a zone near a ground selection line of the nonvolatile memory device.

21. A memory system, comprising:

a memory controller configured to output immune disturbance read mode information; and

a nonvolatile memory device which includes at least one string connected to a bit line, the at least one string including a plurality of memory cells connected in series, each of the plurality of memory cells being connected to a respective word line of a plurality of word lines and stacked in a direction perpendicular to a substrate,

wherein the nonvolatile memory device programs memory cells connected to a selected wordline, performs a verification read operation on the memory cells connected to the selected wordline and, in response to the immune disturbance read mode information, applies a turn-on voltage to the selected wordline while a read pass voltage is applied to unselected wordlines and discharges the read pass voltage of at least one of the unselected wordlines while the turn-on voltage is applied to the selected wordline.

22. The system of claim 21 , wherein the memory controller generates the immune disturbance read mode information when a program/erase cycle value of a read requested memory block is larger than a predetermined value.

23. The system of claim 21 , wherein the wordlines are stacked on top of each other between a substrate and a bit line.

24. The system of claim 21 , wherein the nonvolatile memory device includes first and second adjacent strings connected with a first bit line, wherein the first and second strings each include string selection lines, wordlines, and dummy wordlines.

25. The system of claim 24 , wherein the first and second strings are disposed on a silicon on insulator substrate.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 1, 2014
From: NAM, SANG-WAN; PARK, KITAE; PARK, HYUN-WOOK; RHEE, JAE-KYUN
To: SAMSUNG ELECTRONICS CO., LTD.
Reel/Frame 032575/0001 →
Priority Claims (1)
KR 10-2013-0074576 · Jun 27, 2013 · national
Continuity (1)
Related Publication 20150003169A1 · Jan 1, 2015