IP Library Granted Patent US 9,213,415
Granted Patent B2
US 9,213,415 · App. 13/755,545 · Granted Dec 15, 2015

Reference voltage generator

Inventors: Hideo Yoshino (Chiba, JP); Jun Osanai (Chiba, JP); Masayuki Hashitani (Chiba, JP); Yoshitsugu Hirose (Chiba, JP)
Assignee: SEIKO INSTRUMENTS INC.
G06F3/02H01L27/088H01L27/0883
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Quick Facts
Patent No.
US 9,213,415
App. No.
13/755,545
Granted
Dec 15, 2015
Kind
B2
Abstract

A reference voltage generator has a depletion mode MOS transistor of a first conductivity type for supplying a constant current flow, and an enhancement mode MOS transistor of the first conductivity type having a diode connection to the depletion mode MOS transistor for generating a reference voltage based on a constant current supplied by the depletion mode MOS transistor. The enhancement mode MOS transistor has a mobility substantially equal to a mobility of the depletion mode MOS transistor such that the enhancement mode MOS transistor and the depletion mode MOS transistor have substantially equal temperature characteristics.

Claims (9)

1. A reference voltage generator, comprising:

a depletion mode MOS transistor of a first conductivity type, for supplying a constant current flow; and

an enhancement mode MOS transistor of the first conductivity type having a diode connection to the depletion mode MOS transistor, having a mobility equal to a mobility of the depletion mode MOS transistor, and generating a reference voltage based on a constant current;

wherein the enhancement mode MOS transistor includes a well having an impurity concentration which is lower than an impurity concentration of a well of the depletion mode MOS transistor.

2. A semiconductor integrated circuit having the reference voltage generator according to claim 1 .

3. A reference voltage generator, comprising:

a depletion mode MOS transistor of a first conductivity type for supplying a constant current flow, the depletion mode MOS transistor having a single gate electrode; and

an enhancement mode MOS transistor of the first conductivity type for generating a reference voltage based on a constant current, the enhancement mode MOS transistor having a single gate electrode, a diode connection to the depletion mode MOS transistor, and a mobility equal to a mobility of the depletion mode MOS transistor,

wherein the enhancement mode MOS transistor includes a well having an impurity concentration which is lower than an impurity concentration of a well of the depletion mode MOS transistor.

Assignments (3)
CHANGE OF NAME Recorded Mar 12, 2018
From: SII SEMICONDUCTOR CORPORATION
To: ABLIC INC.
Reel/Frame 045567/0927 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 10, 2016
From: SEIKO INSTRUMENTS INC.
To: SII SEMICONDUCTOR CORPORATION
Reel/Frame 038058/0892 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 13, 2014
From: YOSHINO, HIDEO; OSANAI, JUN; HASHITANI, MASAYUKI; HIROSE, YOSHITSUGU
To: SEIKO INSTRUMENTS INC.
Reel/Frame 032482/0594 →
Priority Claims (1)
JP 2012-028733 · Feb 13, 2012 · national
Continuity (1)
Related Publication 20130207636A1 · Aug 15, 2013