IP Library Granted Patent US 9,214,511
Granted Patent B2
US 9,214,511 · App. 14/203,506 · Granted Dec 15, 2015

Integrated inductor and integrated inductor fabricating method

Inventor: Ta-Hsun Yeh (Hsinchu, TW)
Assignee: Realtek Semiconductor Corp.
H01L28/10H01L23/481H01L23/5225H01L23/5227H01L23/645H01L25/0657H01L2224/16225H01L2224/16227H01L2224/81H01L2225/06527H01L2225/06537H01L2225/06572
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Quick Facts
Patent No.
US 9,214,511
App. No.
14/203,506
Granted
Dec 15, 2015
Kind
B2
Abstract

The present invention provides an integrated inductor and an integrated inductor fabricating method. The integrated inductor comprises: a semiconductor substrate, an inductor, and a redistribution layer (RDL). The inductor is formed above the semiconductor substrate. The RDL is formed above the inductor and has a specific pattern to form a patterned ground shield (PGS). The integrated inductor fabricating method comprises: forming a semiconductor substrate; forming an inductor above the semiconductor substrate; and forming redistribution layer (RDL) having a specific pattern above the inductor to form a patterned ground shield (PGS).

Claims (15)

1. An integrated inductor, comprising:

a semiconductor substrate;

an inductor, formed above the semiconductor substrate; and

only one redistribution layer (RDL) of metal, formed above the inductor with a specific pattern to form a patterned ground shield (PGS) that is grounded, wherein the RDL of metal comprises a plurality of metal strips, and wherein the semiconductor substrate, the inductor, and the plurality of metal strips are within a semiconductor chip, and each of the metal strips has an exposed surface from the semiconductor chip.

2. The integrated inductor of claim 1 , wherein material of the RDL of metal is aluminum.

3. The integrated inductor of claim 1 , applied to an integrated passive device (IPD) in a 3D IC.

4. The integrated inductor of claim 1 , wherein there is no PGS between the inductor and the semiconductor substrate.

5. The integrated inductor of claim 1 , applied to Flip Chip.

6. The integrated inductor of claim 1 , wherein the RDL of metal is substantially orthogonal to the inductor above the inductor.

7. An integrated inductor fabricating method, comprising:

forming a semiconductor substrate;

forming an inductor above the semiconductor substrate; and

forming only one redistribution layer (RDL) of metal above the inductor with a specific pattern to form a patterned ground shield (PGS) that is grounded, wherein the RDL of metal comprises a plurality of metal strips, and wherein the semiconductor substrate, the inductor, and the plurality of metal strips are within a semiconductor chip, and each of the metal strips has an exposed surface from the semiconductor chip.

8. The integrated inductor fabricating method of claim 7 , wherein material of the RDL of metal is aluminum.

9. The integrated inductor fabricating method of claim 7 , wherein the RDL of metal is substantially orthogonal to the inductor above the inductor.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 10, 2014
From: YEH, TA-HSUN
To: REALTEK SEMICONDUCTOR CORP.
Reel/Frame 032400/0189 →
Priority Claims (1)
TW 102110484 A · Mar 25, 2013 · national
Continuity (1)
Related Publication 20140284763A1 · Sep 25, 2014