Semiconductor system, device and structure with heat removal
A 3D device including: a first layer including first transistors, the first layer overlaid by at least one interconnection layer; a second layer including second transistors, the second layer overlaying the interconnection layer; a plurality of electrical connections connecting the second transistors with the interconnection layer; and at least one thermally conductive and electrically non-conductive contact, where the at least one thermally conductive and electrically non-conductive contact thermally connects the second layer to a top or bottom surface of the 3D device.
1. A 3D device comprising:
a first layer comprising first transistors, said first layer overlaid by at least one interconnection layer;
a second layer comprising second transistors, said second layer overlaying said interconnection layer;
a plurality of electrical connections connecting said second transistors with said interconnection layer; and
at least one thermally conductive and electrically non-conductive contact,
wherein said at least one thermally conductive and electrically non-conductive contact thermally connects said second layer to a top or bottom surface of said 3D device.
2. A 3D device according to claim 1 ,
wherein said plurality of electrical connections comprises at least one through-silicon-via, said at least one through-silicon-via comprises a material which has a thermal conductivity greater than 10 W/m-K.
3. A 3D device according to claim 1 , further comprising:
a heat-spreader layer disposed between said first layer and said second layer.
4. A 3D device according to claim 1 , further comprising:
a power distribution network to provide power to said second transistors,
wherein said power distribution network provides a heat removal path between at least one of said second transistors and the top or bottom surface of said 3D device.
5. A 3D device according to claim 1 ,
wherein said plurality of electrical connections comprise thru layer vias and,
wherein said thru layer vias have a density greater than 10,000 vias/cm 2 .
6. A 3D device according to claim 1 , further comprising:
a via through said second layer,
wherein said via is part of a heat removal structure of said device.
7. A 3D device according to claim 1 ,
wherein said interconnection layer comprises a power grid to provide power to at least one of said second transistors.
8. A system, comprising: a 3D device, said 3D device comprising:
a first layer comprising first transistors, said first layer overlaid by a first interconnection layer;
a second layer comprising second transistors, said second layer overlaying said first interconnection layer;
a plurality of second interconnection layers overlaying said second layer;
a plurality of electrical connections connecting at least one of said second interconnection layers with said first interconnection layer; and
a plurality of thermally conducting paths from said second transistors to a top or bottom surface of said 3D device.
9. A system according to claim 8 ,
wherein said second layer has a thickness less than 2 microns.
10. A system according to claim 8 , further comprising:
a heat-spreader layer disposed between said first layer and said second layer.
11. A system according to claim 8 , further comprising:
a power distribution network to provide power to said second transistors,
wherein said power distribution network provides a heat removal path between at least one of said second transistors and the top or bottom surface of said 3D device.
12. A system according to claim 8 ,
wherein said plurality of electrical connections comprise thru layer vias and,
wherein said thru layer vias have a density greater than 10,000 vias/cm 2 .
13. A system according to claim 8 , further comprising:
at least one thermally conductive and electrically non-conducting contact to said second layer.
14. A system, comprising: a 3D device, said 3D device comprising:
a first layer comprising first transistors, said first layer overlaid by at least one interconnection layer,
a second layer comprising second transistors, said second layer overlaying said interconnection layer;
a plurality of electrical connections connecting said second transistors with said interconnection layer; said plurality of electrical connections further comprising:
a power distribution grid providing power to said second transistors, and
a plurality of thermally conducting paths from said power distribution grid to a top or bottom surface of said 3D device,
wherein said second layer has a thickness less than 2 microns.
15. A system according to claim 14 ,
wherein said plurality of electrical connections comprises a through-silicon connection, and
wherein at least one of said plurality of electrical connections comprises at least one thermally conductive and electrically non-conductive contact.
16. A system according to claim 14 , further comprising:
a heat-spreader layer disposed between said first layer and said second layer.
17. A system according to claim 14 ,
wherein a portion of said power distribution grid is between said first layer and said second layer.
18. A system according to claim 14 ,
wherein said plurality of electrical connections comprise thru layer vias and,
wherein said thru layer vias have a density greater than 10,000 vias/cm 2 .
19. A system according to claim 14 , further comprising:
at least one thermally conductive and electrically non-conducting contact to said second layer.
20. A system according to claim 14 ,
wherein said second transistors are FinFET type transistors.