IP Library Granted Patent US 9,306,500
Granted Patent B2
US 9,306,500 · App. 14/462,625 · Granted Apr 5, 2016

Cascode amplifier

Inventors: Yoshinori Takahashi (Tokyo, JP); Miyo Miyashita (Tokyo, JP); Kazuya Yamamoto (Tokyo, JP)
Assignee: MITSUBISHI ELECTRIC CORPORATION
H03F1/0211H03F1/223H03F3/195H03F3/245H03F2200/18
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 9,306,500
App. No.
14/462,625
Granted
Apr 5, 2016
Kind
B2
Abstract

A cascode amplifier includes: a first transistor having a gate to which a signal is input, a grounded source, and a drain; a second transistor having a gate, a source connected to the drain of the first transistor, and a drain; a load connected to the drain of the second transistor; a DC-DC converter supplying a supply voltage, which is variable according to output power, to the drain of the second transistor via the load; and a first bias circuit supplying a voltage, which is a function of the supply voltage, to the gate of the second transistor.

Claims (35)

1. A cascode amplifier comprising:

a first transistor having a gate to which a signal is input, a grounded source, and a drain;

a second transistor having a gate, a source connected to the drain of the first transistor, and a drain;

a load connected to the drain of the second transistor;

a DC-DC converter supplying a supply voltage, which is variable according to output power, to the drain of the second transistor via the load;

a first bias circuit supplying a voltage, which is a function of the supply voltage, to the gate of the second transistor; and

a second bias circuit supplying a voltage, which is a function of the supply voltage, to the gate of the first transistor, wherein output voltage of the second bias circuit decreases with an increase of the supply voltage.

2. A cascode amplifier according to claim 1 , wherein output voltage of the first bias circuit increases with an increase of the supply voltage.

3. The cascode amplifier according to claim 1 , wherein the first bias circuit limits drain voltage of the first transistor so as not to exceed a certain voltage.

4. The cascode amplifier according to claim 1 , wherein the first bias circuit limits drain voltage of the first transistor so as not to fall below a certain voltage.

5. A cascode amplifier comprising:

a first transistor having a gate to which a signal is input, a grounded source, and a drain;

a second transistor having a gate, a source connected to the drain of the first transistor, and a drain;

a load connected to the drain of the second transistor;

a DC-DC converter supplying a supply voltage, which is variable according to output power, to the drain of the second transistor via the load; and

a first bias circuit supplying a voltage, which is a function of the supply voltage, to the gate of the second transistor, wherein the function relating the voltage supplied by the first bias circuit to the supply voltage changes according to an operating mode signal input from outside the cascode amplifier.

6. A cascode amplifier comprising:

a first transistor having a gate to which a signal is input, a grounded source, and a drain;

a second transistor having a gate, a source connected to the drain of the first transistor, and a drain;

a load connected to the drain of the second transistor;

a DC-DC converter supplying a supply voltage, which is variable according to output power, to the drain of the second transistor via the load;

a first bias circuit supplying a voltage, which is a function of the supply voltage, to the gate of the second transistor, wherein the first bias circuit includes

a plurality of limiter amplifiers, wherein

each limiter amplifier includes respective differential input terminals, and

the supply voltage is input to first terminals of the differential input terminals,

a plurality of reference voltage sources supplying reference voltages to second terminals of respective differential input terminals, and

an adder adding outputs of the limiter amplifiers.

7. The cascode amplifier according to claim 1 , further comprising a low pass filter connected between an input of the first bias circuit and the drain of the second transistor.

8. A cascode amplifier comprising:

a first transistor having a gate to which a signal is input, a grounded source, and a drain;

a second transistor having a gate, a source connected to the drain of the first transistor, and a drain;

a load connected to the drain of the second transistor;

a DC-DC converter supplying a supply voltage, which is variable according to output power, to the drain of the second transistor via the load;

a first bias circuit supplying a voltage, which is a function of the supply voltage, to the gate of the second transistor; and

a memory storing digital information input from outside the cascode amplifier, wherein the function relating the voltage supplied by the first bias circuit to the supply voltage is set according to the digital information.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 21, 2019
From: MITSUBISHI ELECTRIC CORPORATION
To: MURATA MANUFACTURING CO., LTD.
Reel/Frame 048072/0626 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 19, 2014
From: TAKAHASHI, YOSHINORI; MIYASHITA, MIYO; YAMAMOTO, KAZUYA
To: MITSUBISHI ELECTRIC CORPORATION
Reel/Frame 033560/0124 →
Priority Claims (1)
JP 2013-259217 · Dec 16, 2013 · national
Continuity (1)
Related Publication 20150171794A1 · Jun 18, 2015