Processor frequency mainly depending on a target frame rate while processing a graphics application

1. A variable frequency processor, comprising:

a processing core operable at a clock frequency to undertake a processing of a graphics application; and

a clock frequency controller coupled to said processing core and operable to adjust said clock frequency based on a current frame rate of said processing, a target frame rate for said processing, a current load of said variable frequency processor, and a target load for said variable frequency processor, said clock frequency controller configured to:

make a preliminary decision to scale down said clock frequency if said current load of said variable frequency processor is below said target load;

make a preliminary decision to scale up said clock frequency if said current load of said variable frequency processor is above said target load;

increase said clock frequency if said current frame rate is below said target frame rate irrespective of said preliminary decision;

decrease said clock frequency if said current frame rate exceeds said target frame rate and said preliminary decision is to scale down said clock frequency; and

maintain said clock frequency if said current frame rate exceeds said target frame rate and said preliminary decision is to scale up said clock frequency.

2. The variable frequency processor recited in claim 1 wherein said processor is a central processing unit.

3. The variable frequency processor recited in claim 1 wherein said graphics application generates graphics to be displayed on a display device having a refresh rate related to said target frame rate.

4. The variable frequency processor recited in claim 1 wherein said target frame rate is dependent upon said graphics application.

5. The variable frequency processor recited in claim 1 wherein said clock frequency controller is further operable to compute said current frame rate based on a weighted average of recent frame times.

6. A method of scaling a clock frequency of a processing core processing a graphics application, comprising:

determining a current frame rate and current processor load;

making a preliminary decision to scale down said clock frequency if said current processor load is below a target processor load;

making a preliminary decision to scale up said clock frequency if said current processor load is above said target processor load;

scaling up said clock frequency if said current frame rate is below a target frame rate irrespective of said preliminary decision;

scaling down said clock frequency if said current frame rate exceeds said target frame rate and said preliminary decision is to scale down said clock frequency; and

maintaining said clock frequency if said current frame rate exceeds said target frame rate and said preliminary decision is to scale up said clock frequency.

7. The method recited in claim 6 further comprising maintaining said clock frequency if said processing core is operating above a processing load limit and said current frame rate at least equals said target frame rate.

8. The method recited in claim 6 wherein said determining comprises determining said current frame rate based on a current frame time and a target frame time.

9. The method recited in claim 6 further comprising displaying graphics yielded by said graphics application on a display device having a refresh rate.

10. The method recited in claim 9 wherein said target frame rate is based on said refresh rate.

11. The method recited in claim 6 wherein said processing core is a central processing unit.

12. A computing system operable to execute an application for generating graphics at a target frame rate, comprising:

a display device operable to display said graphics at a current frame rate;

a display controller configured to determine said current frame rate; and

a variable frequency processor coupled to said display controller and including:

a processing core operable at a clock frequency to undertake a processing of said application, and

a clock frequency controller associated with said processing core and operable to adjust said clock frequency based on a current frame rate of said processing, a target frame rate for said processing, a current load of said variable frequency processor, and a target load for said variable frequency processor, said clock frequency controller circuit configured to:

make a preliminary decision to scale down said clock frequency if said current load of said variable frequency processor is below said target load;

make a preliminary decision to scale up said clock frequency if said current load of said variable frequency processor is above said target load;

increase said clock frequency if said current frame rate is below said target frame rate irrespective of said preliminary decision;

decrease said clock frequency if said current frame rate exceeds said target frame rate and said preliminary decision is to scale down said clock frequency; and

maintain said clock frequency if said current frame rate exceeds said target frame rate and said preliminary decision is to scale up said clock frequency.

13. The computing system recited in claim 12 wherein said variable frequency processor is a central processing unit.

14. The computing system recited in claim 12 wherein said clock frequency controller is further operable to compute said current frame rate based on a weighted average of recent frame times.

15. The computing system recited in claim 12 wherein said display controller is further operable to compute said current frame rate based on a weighted average of recent frame times.