IP Library Granted Patent US 9,329,660
Granted Patent B2
US 9,329,660 · App. 14/076,872 · Granted May 3, 2016

Lowest power mode for a mobile drive

Inventors: Ravishanker Krishnamoorthy (Chiltren Park, SG); Yun Yang (Los Altos, CA); Abdul Elaydi (Santa Clara, CA)
Assignee: Marvell World Trade Ltd.
G06F1/3234G06F1/3203G06F1/3206G11B25/043G11B33/121
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Quick Facts
Patent No.
US 9,329,660
App. No.
14/076,872
Granted
May 3, 2016
Kind
B2
Abstract

A hard disk drive enters a low power mode to reduce power consumption. To maintain communication with a host device, a communication interface remains energized along with a circuit portion storing configuration data for the communication interface. To energize the communication interface and the circuit portion, low power voltage regulators provide suitable reference voltages. One low power voltage regulator is dedicated to this purpose. Another voltage regulator is converted from an active, switching mode to a low power, linear mode to provide the necessary reference voltage. Also, unique handshaking signals are used to control entry and exit from the low power mode by the hard disk drive.

Claims (39)

1. A storage device configured to operate in an active mode and a low power mode, the storage device comprising:

an interface configured to communicate with an external device;

a core in communication with the interface, the core configured to maintain configuration information for the interface when the storage device operates in the low power mode; and

a module configured to output a first signal to the core and a second signal to the interface when the storage device operates in the low power mode,

wherein, during the low power mode, the core is configured to maintain the configuration information in response to receipt of the first signal and the interface is configured to be active in response to receipt of the second signal.

2. The storage device of claim 1 , wherein the configuration information comprises at least one of a device identifier and a configuration for the storage device.

3. The storage device of claim 1 , wherein the module is configured to operate in a linear mode to generate the first signal when the storage device operates in the low power mode.

4. The storage device of claim 3 , wherein the module is further configured to:

operate in a switching mode to generate the first signal when the storage device operates in the active mode; and

switch from the switching mode to the linear mode when the storage device switches from the active mode to the low power mode.

5. The storage device of claim 1 , wherein the module comprises a plurality of regulators, and wherein, when the storage device switches from the active mode to the low power mode, all of the plurality of regulators are configured to power down except a first regulator configured to generate the first signal and a second regulator configured to generate the second signal.

6. The storage device of claim 1 , wherein the core comprises one or more registers to maintain the configuration information for the interface when the core is in receipt of the first signal.

7. The storage device of claim 1 , wherein the interface comprises a first interface, the storage device further comprising a second interface that receives a command instructing the storage device to switch from the active mode to the lower power mode.

8. The storage device of claim 1 , wherein the module comprises a bandgap regulator configured to generate the first signal.

9. The storage device of claim 1 , wherein the module comprises a regulator configured to communicate only with the interface when the storage device operates in the low power mode.

10. The storage device of claim 1 , wherein all circuit components of the storage device are powered down during the low power mode except the core, the interface, and the module.

11. The storage device of claim 10 , wherein the circuit components powered when the storage device operates in the low power mode comprise a motor controller having a spindle core circuit and a voice coil motor circuit.

12. The storage device of claim 1 , wherein the storage device has a standby current of less than about 500 microamps in the low power mode.

13. The storage device of claim 1 , wherein the interface comprises a Universal Serial Bus (USB) interface.

14. A method of operating a storage device in an active mode and a low power mode, the method comprising:

when operating the storage device in the low power mode:

outputting, with a module, a first signal to a core of the storage device and a second signal to an interface of the storage device;

maintaining, with the core, configuration information for the interface in response to receiving the first signal output by the module; and

operating the interface in an active state to communicate with an external device in response to receiving the second signal output by the module.

15. The method of claim 14 , wherein the configuration information comprises at least one of a device identifier and a configuration for the storage device.

16. The method of claim 14 , further comprising:

operating the module in a linear mode to generate the first signal when the storage device is operating in the low power mode.

17. The method of claim 16 , further comprising:

operating the module in a switching mode to generate the first signal when the storage device is operating in the active mode; and

switching the module from the switching mode to the linear mode when the storage device switches from operating in the active mode to operating in the low power mode.

18. The method of claim 14 , wherein the module comprises a plurality of regulators, the method further comprising:

when switching the storage device from operating in the active mode to the low power mode:

generating the first signal with a first regulator of the plurality of regulators;

generating the second signal with a second regulator of the plurality of regulators; and

powering down the plurality of regulators except the first regulator and the second regulator.

19. The method of claim 14 , wherein outputting the second signal to the interface comprises outputting, with a regulator of the module, the second signal to the interface without the regulator communicating with any other circuit component of the storage device.

20. The method of claim 14 , further comprising:

when the storage device is operating in the low power mode,

powering down a motor controller having a spindle core circuit and a voice coil motor circuit of the storage device.

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 16, 2020
From: CAVIUM INTERNATIONAL
To: MARVELL ASIA PTE, LTD.
Reel/Frame 053475/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 20, 2020
From: MARVELL INTERNATIONAL LTD.
To: CAVIUM INTERNATIONAL
Reel/Frame 052918/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 29, 2020
From: MARVELL WORLD TRADE LTD.
To: MARVELL INTERNATIONAL LTD.
Reel/Frame 051778/0537 →
Continuity (5)
Continuation 12240487 · Sep 29, 2008
Continuation 11699138 · Jan 26, 2007
Provisional Application 60779975 · Mar 7, 2006
Provisional Application 60783944 · Mar 20, 2006
Related Publication 20140075229A1 · Mar 13, 2014