IP Library Granted Patent US 9,343,517
Granted Patent B2
US 9,343,517 · App. 13/020,216 · Granted May 17, 2016

Display device

Inventors: Shunpei Yamazaki (Setagaya, JP); Kengo Akimoto (Atsugi, JP); Shigeki Komori (Isehara, JP); Hideki Uochi (Atsugi, JP); Rihito Wada (Atsugi, JP); Yoko Chiba (Atsugi, JP)
Assignee: Semiconductor Energy Laboratory Co., Ltd.
H01L27/3276G02F1/13458H01L27/1225H01L29/41733H01L29/66969H01L29/7869G09G2300/0804H01L27/3262H01L51/5221
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Quick Facts
Patent No.
US 9,343,517
App. No.
13/020,216
Granted
May 17, 2016
Kind
B2
Abstract

A display device includes a pixel portion in which a pixel electrode layer is arranged in a matrix, and an inverted staggered thin film transistor having a combination of at least two kinds of oxide semiconductor layers with different amounts of oxygen is provided corresponding to the pixel electrode layer. In the periphery of the pixel portion in this display device, a pad portion is provided to be electrically connected to a common electrode layer formed on a counter substrate through a conductive layer made of the same material as the pixel electrode layer. One objection of our invention to prevent a defect due to separation of a thin film in various kinds of display devices is realized, by providing a structure suitable for a pad portion provided in a display panel.

Claims (169)

1. A semiconductor device comprising:

a gate electrode;

a gate insulating layer over the gate electrode;

a semiconductor layer comprising an oxide semiconductor including indium over the gate insulating layer;

a source electrode and a drain electrode over the semiconductor layer;

a protective insulating layer over the source electrode and the drain electrode;

a pixel electrode over the protective insulating layer and electrically connected to one of the source electrode and the drain electrode;

a liquid crystal layer over the pixel electrode;

a counter electrode over the liquid crystal layer;

a conductive particle; and

a common connection portion comprising:

a first conductive layer;

a first insulating layer over the first conductive layer;

a second conductive layer over the first insulating layer;

a second insulating layer over the second conductive layer; and

a transparent conductive layer over the second insulating layer,

wherein the semiconductor layer has a recessed portion between the source electrode and the drain electrode,

wherein an entirety of the semiconductor layer overlaps with the gate electrode,

wherein a periphery portion of the semiconductor layer has a tapered shape,

wherein the first conductive layer is electrically connected to the transparent conductive layer,

wherein the second conductive layer is electrically connected to the transparent conductive layer,

wherein a first part of the transparent conductive layer is located in a first opening of the second insulating layer and a second part of the transparent conductive layer is located in a second opening of the second insulating layer,

wherein the transparent conductive layer is electrically connected to the counter electrode through the conductive particle,

wherein the first conductive layer comprises a same material as the gate electrode,

wherein the second conductive layer comprises a same material as one of the source electrode and the drain electrode,

wherein the first insulating layer is a same layer as the gate insulating layer,

wherein the second insulating layer is a same layer as the protective insulating layer, and

wherein the conductive particle overlaps with the first conductive layer and the transparent conductive layer.

2. The semiconductor device according to claim 1 , wherein a side surface of the recessed portion aligns with a side surface of one of the source electrode and the drain electrode.

3. The semiconductor device according to claim 1 , wherein the oxide semiconductor is an In—Ga—Zn—O based oxide semiconductor.

4. The semiconductor device according to claim 1 , further comprising:

an insulating layer over the semiconductor layer, the source electrode, and the drain electrode,

wherein the insulating layer is in contact with the semiconductor layer in the recessed portion.

5. The semiconductor device according to claim 1 , further comprising:

an insulating layer over the semiconductor layer, the source electrode, and the drain electrode,

wherein the insulating layer is in contact with the semiconductor layer in the recessed portion, and

wherein the insulating layer comprises aluminum oxide.

6. The semiconductor device according to claim 1 ,

wherein the pixel electrode comprises a transparent conductive material.

7. The semiconductor device according to claim 1 , further comprising:

a second gate electrode adjacent to the gate electrode,

wherein the second gate electrode extends to form a gate wiring, and

wherein the pixel electrode overlaps with the gate wiring.

8. The semiconductor device according to claim 1 ,

wherein the source electrode is in contact with a side surface of the semiconductor layer, and

wherein the drain electrode is in contact with a side surface of the semiconductor layer.

9. The semiconductor device according to claim 1 , wherein one of the source electrode and the drain electrode is arranged so as to enclose an edge of the other one of the source electrode and the drain electrode.

10. The semiconductor device according to claim 1 , wherein the gate electrode is projected from a gate wiring.

11. The semiconductor device according to claim 1 , further comprising:

an insulating layer over the semiconductor layer, the source electrode, and the drain electrode,

wherein the insulating layer is in contact with the semiconductor layer in the recessed portion,

wherein the gate insulating layer is in contact with a bottom surface of the semiconductor layer,

wherein the insulating layer comprises silicon and oxygen,

wherein the gate insulating layer comprises silicon and oxygen, and

wherein the insulating layer and the gate insulating layer are in contact with each other.

12. A semiconductor device comprising:

a gate electrode;

a gate insulating layer over the gate electrode;

a semiconductor layer comprising an oxide semiconductor including indium over the gate insulating layer;

a source electrode and a drain electrode over the semiconductor layer;

a protective insulating layer over the source electrode and the drain electrode;

a pixel electrode over the protective insulating layer and electrically connected to one of the source electrode and the drain electrode;

a liquid crystal layer over the pixel electrode;

a counter electrode over the liquid crystal layer;

a conductive particle; and

a common connection portion comprising:

a first conductive layer;

a first insulating layer over the first conductive layer;

a second conductive layer over the first insulating layer;

a second insulating layer over the second conductive layer; and

a transparent conductive layer over the second insulating layer,

wherein the semiconductor layer has a recessed portion between the source electrode and the drain electrode,

wherein one of the source electrode and the drain electrode is arranged so as to enclose an edge of the other one of the source electrode and the drain electrode,

wherein a periphery portion of the semiconductor layer has a tapered shape,

wherein the first conductive layer is electrically connected to the transparent conductive layer,

wherein the second conductive layer is electrically connected to the transparent conductive layer,

wherein a first part of the transparent conductive layer is located in a first opening of the second insulating layer and a second part of the transparent conductive layer is located in a second opening of the second insulating layer,

wherein the transparent conductive layer is electrically connected to the counter electrode through the conductive particle,

wherein the first conductive layer comprises a same material as the gate electrode,

wherein the second conductive layer comprises a same material as one of the source electrode and the drain electrode,

wherein the first insulating layer is a same layer as the gate insulating layer,

wherein the second insulating layer is a same layer as the protective insulating layer, and

wherein the conductive particle overlaps with the first conductive layer and the transparent conductive layer.

13. The semiconductor device according to claim 12 , wherein a side surface of the recessed portion aligns with a side surface of one of the source electrode and the drain electrode.

14. The semiconductor device according to claim 12 , wherein the oxide semiconductor is an In—Ga—Zn—O based oxide semiconductor.

15. The semiconductor device according to claim 12 , further comprising:

an insulating layer over the semiconductor layer, the source electrode, and the drain electrode,

wherein the insulating layer is in contact with the semiconductor layer in the recessed portion.

16. The semiconductor device according to claim 12 , further comprising:

an insulating layer over the semiconductor layer, the source electrode, and the drain electrode,

wherein the insulating layer is in contact with the semiconductor layer in the recessed portion, and

wherein the insulating layer comprises aluminum oxide.

17. The semiconductor device according to claim 12 , wherein the pixel electrode comprises a transparent conductive material.

18. The semiconductor device according to claim 12 , further comprising:

a second gate electrode adjacent to the gate electrode,

wherein the second gate electrode extends to form a gate wiring, and

wherein the pixel electrode overlaps with the gate wiring.

19. The semiconductor device according to claim 12 ,

wherein the source electrode is in contact with a side surface of the semiconductor layer, and

wherein the drain electrode is in contact with a side surface of the semiconductor layer.

20. The semiconductor device according to claim 12 , wherein one of the source electrode and the drain electrode comprises a region having a U-shape.

21. The semiconductor device according to claim 12 ,

wherein an end portion of the source electrode is rounded, and

wherein an end portion of the drain electrode is rounded.

22. The semiconductor device according to claim 12 , wherein an entirety of the semiconductor layer overlaps with the gate electrode.

23. The semiconductor device according to claim 12 , wherein the gate electrode is projected from a gate wiring.

24. The semiconductor device according to claim 12 , further comprising:

an insulating layer over the semiconductor layer, the source electrode, and the drain electrode,

wherein the insulating layer is in contact with the semiconductor layer in the recessed portion,

wherein the gate insulating layer is in contact with a bottom surface of the semiconductor layer,

wherein the insulating layer comprises silicon and oxygen,

wherein the gate insulating layer comprises silicon and oxygen, and

wherein the insulating layer and the gate insulating layer are in contact with each other.

25. A semiconductor device comprising:

a gate electrode;

a gate insulating layer over the gate electrode;

a semiconductor layer comprising an oxide semiconductor including indium over the gate insulating layer;

a source electrode and a drain electrode over the semiconductor layer;

a protective insulating layer over the source electrode and the drain electrode;

a pixel electrode over the protective insulating layer and electrically connected to one of the source electrode and the drain electrode;

a liquid crystal layer over the pixel electrode;

a counter electrode over the liquid crystal layer;

a conductive particle; and

a common connection portion comprising:

a first conductive layer;

a first insulating layer over the first conductive layer;

a second conductive layer over the first insulating layer;

a second insulating layer over the second conductive layer; and

a transparent conductive layer over the second insulating layer,

wherein a periphery portion of the semiconductor layer has a tapered shape,

wherein the first conductive layer is electrically connected to the transparent conductive layer,

wherein the second conductive layer is electrically connected to the transparent conductive layer,

wherein a first part of the transparent conductive layer is located in a first opening of the second insulating layer and a second part of the transparent conductive layer is located in a second opening of the second insulating layer,

wherein the transparent conductive layer is electrically connected to the counter electrode through the conductive particle,

wherein the first conductive layer comprises a same material as the gate electrode,

wherein the second conductive layer comprises a same material as one of the source electrode and the drain electrode,

wherein the first insulating layer is a same layer as the gate insulating layer,

wherein the second insulating layer is a same layer as the protective insulating layer, and

wherein the conductive particle overlaps with the first conductive layer and the transparent conductive layer.

26. The semiconductor device according to claim 25 , wherein the oxide semiconductor is an In—Ga—Zn—O based oxide semiconductor.

27. The semiconductor device according to claim 25 , further comprising:

an insulating layer over the semiconductor layer, the source electrode, and the drain electrode,

wherein the insulating layer is in contact with a top surface of the semiconductor layer.

28. The semiconductor device according to claim 25 , further comprising:

an insulating layer over the semiconductor layer, the source electrode, and the drain electrode,

wherein the insulating layer is in contact with a top surface of the semiconductor layer, and

wherein the insulating layer comprises aluminum oxide.

29. The semiconductor device according to claim 25 , wherein the pixel electrode comprises a transparent conductive material.

30. The semiconductor device according to claim 25 , further comprising:

a second gate electrode adjacent to the gate electrode,

wherein the second gate electrode extends to form a gate wiring, and

wherein the pixel electrode overlaps with the gate wiring.

31. The semiconductor device according to claim 25 ,

wherein the source electrode is in contact with a side surface of the semiconductor layer, and

wherein the drain electrode is in contact with a side surface of the semiconductor layer.

32. The semiconductor device according to claim 25 , wherein one of the source electrode and the drain electrode is arranged so as to enclose an edge of the other one of the source electrode and the drain electrode.

33. The semiconductor device according to claim 25 , wherein the gate electrode is projected from a gate wiring.

34. The semiconductor device according to claim 25 , further comprising:

an insulating layer over the semiconductor layer, the source electrode, and the drain electrode,

wherein the insulating layer is in contact with a top surface of the semiconductor layer,

wherein the gate insulating layer is in contact with a bottom surface of the semiconductor layer,

wherein the insulating layer comprises silicon and oxygen,

wherein the gate insulating layer comprises silicon and oxygen, and

wherein the insulating layer and the gate insulating layer are in contact with each other.

35. The semiconductor device according to claim 25 , wherein an entirety of the semiconductor layer overlaps with the gate electrode.

36. The semiconductor device according to claim 25 , wherein the common connection portion comprises an oxide semiconductor layer between the first insulating layer and the second conductive layer.

37. The semiconductor device according to claim 25 ,

wherein the common connection portion comprises an oxide semiconductor layer between the first insulating layer and the second conductive layer, and

wherein the oxide semiconductor layer is a same layer as the semiconductor layer.

Priority Claims (1)
JP 2008-241335 · Sep 19, 2008 · national
Continuity (2)
Continuation 12556594 · Sep 10, 2009
Related Publication 20110133183A1 · Jun 9, 2011