Removal and optimization of coherence acknowledgement responses in an interconnect

1. A method of performing a cache transaction comprising:

transmitting a cache request to a target device;

receiving a cache response that is associated with the cache request; and

completing the cache transaction by, based at least in part upon a type associated with the cache request, embedding a cache response acknowledgement within a second cache request to the target device, and without transmitting an exclusive cache response acknowledgement message to the target device.

2. The method of claim 1 , wherein embedding a cache response acknowledgement within a second cache request comprises:

determining if the second cache request comprises a number of superfluous bits at least equal to a size of a cache response acknowledgement associated with the cache response; and

setting at least a portion of the superfluous bits equal to the cache response acknowledgement.

3. The method of claim 2 , wherein determining if the second cache request comprises a number of superfluous bits at least equal to a size of a cache response acknowledgement comprises:

determining if the second cache request comprises a cache-line-only cacheable request.

4. The method of claim 2 , wherein the cache response acknowledgement includes an identifier associated with the cache request.

5. The method of claim 1 , wherein the cache request comprises a victim cache request;

further comprising preparing to transmit a snoop cache request to the target device; and

wherein completing the cache transaction comprises delaying the transmittal of the snoop cache request until the cache response that is associated with the victim cache request has been received.

6. The method of claim 1 , wherein the cache request to the target device comprises a write cache request associated with a cache line; and

wherein completing the cache transaction comprises completing the cache transaction without transmitting an exclusive cache response acknowledgement message, if the cache line was not allocated prior to the write cache request.

7. The method of claim 1 , wherein the cache request to the target device comprises a write cache request associated with a cache line; and

wherein completing the cache transaction comprises completing the cache transaction without transmitting an exclusive cache response acknowledgement message, if the cache line was allocated prior to the write cache request.

8. The method of claim 1 , wherein the cache request to the target device comprises a read cache request;

further comprising:

determining if communication with the target device employs either a first protocol or a second protocol, and

if the communication with the target device employs the first protocol, completing the cache transaction by transmitting an exclusive cache response acknowledgement message to the target device; and

wherein completing the cache transaction without transmitting an exclusive cache response acknowledgement message comprises completing the cache transaction without transmitting an exclusive cache response acknowledgement message, if the communication with the target device employs the second protocol.

9. An apparatus comprising:

a request queue configured to:

receive a cache request to a target device, wherein the cache request comprises a beginning of a cache transaction;

a transaction queue manager configured to:

transmit the cache request to a target device, and

receive a cache response that is associated with the cache request; and

an acknowledgement manager configured to, depending at least in part upon a type associated with the cache request,

embed a cache response acknowledgement within a second cache request to the target device, and

complete the cache transaction without transmitting an exclusive cache response acknowledgement message to the target device.

10. The apparatus of claim 9 , wherein the acknowledgement manager is configured to:

determine if the second cache request comprises a number of superfluous bits at least equal to a size of a cache response acknowledgement associated with the cache response; and

set at least a portion of the superfluous bits equal to the cache response acknowledgement.

11. The apparatus of claim 9 , wherein the acknowledgement manager is configured to:

determine if the second cache request comprises a cache-line-only cacheable request.

12. The apparatus of claim 9 , wherein the cache response acknowledgement includes an identifier associated with the cache request.

13. The apparatus of claim 9 , wherein the cache request comprises a victim cache request; and

wherein the acknowledgement manager is configured to:

delay the transmittal of a snoop cache request, associated with the victim cache request, until the cache response that is associated with the victim cache request has been received.

14. The apparatus of claim 9 , wherein the cache request comprises a write cache request associated with a cache line; and

wherein the acknowledgement manager is configured to:

complete the cache transaction without transmitting an exclusive cache response acknowledgement message only if the cache line was allocated prior to the write cache request.

15. The apparatus of claim 9 , wherein the cache request to the target device comprises a read cache request; and

wherein the acknowledgement manager is configured to:

determine if communication with the target device employs either a first protocol or a second protocol,

if the communication with the target device employs the first protocol, complete the cache transaction by transmitting an exclusive cache response acknowledgement message to the target device, and

if the communication with the target device employs the second protocol, complete the cache transaction without transmitting an exclusive cache response acknowledgement message.

16. A computer program product for performing a cache transaction, the computer program product being tangibly embodied on a computer-readable medium and comprising executable code that, when executed, is configured to cause a data processing apparatus to:

transmit a cache request to a target device;

receive a cache response that is associated with the cache request; and

complete the cache transaction, depending at least in part upon a type associated with the cache request, embed a cache response acknowledgement within a second cache request to the target device, and without transmitting an exclusive cache response acknowledgement message to the target device.

17. The computer program product of claim 16 , wherein the executable code that, when executed, is configured to cause the data processing apparatus to:

if the cache request is of a predefined type, complete the cache transaction by transmitting an exclusive cache response acknowledgement message to the target device.

18. The computer program product of claim 16 , wherein the executable code that, when executed, is configured to cause the data processing apparatus to:

if the cache request to the target device comprises a write cache request associated with a cache line, and only if the cache line was not allocated prior to the write cache request,

complete the cache transaction without transmitting an exclusive cache response acknowledgement message.

19. The computer program product of claim 16 , wherein the executable code that, when executed, is configured to cause the data processing apparatus to:

determine if communication with the target device employs either a first protocol or a second protocol,

if the communication with the target device employs the first protocol, complete the cache transaction by transmitting an exclusive cache response acknowledgement message to the target device, and

if the communication with the target device employs the second protocol, complete the cache transaction without transmitting an exclusive cache response acknowledgement message.