IP Library Granted Patent US 9,355,492
Granted Patent B2
US 9,355,492 · App. 14/098,468 · Granted May 31, 2016

System, method, and computer program product for utilizing a wavefront path tracer

Inventors: Marc Droske (Berlin, DE); Daniel Johannes Seibert (Berlin, DE); Stefan Radig (Brandenburg, DE); Alexander Keller (Berlin, DE); Julia Floetotto (Berlin, DE); Samuli Matias Laine (Vantaa, FI); Tero Tapani Karras (Helsinki, FI); Timo Oskari Aila (Tuusula, FI); Leonhard Gruenschloss (Pyrmont, AU)
Assignee: NVIDIA Corporation
G06T15/06
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Quick Facts
Patent No.
US 9,355,492
App. No.
14/098,468
Granted
May 31, 2016
Kind
B2
Abstract

A system, method, and computer program product are provided for utilizing a wavefront path tracer. In use, a set of light transport paths associated with a scene is identified. Additionally, parallel path tracing is performed, utilizing a wavefront path tracer.

Claims (50)

1. A method, comprising:

identifying, by a processor, a set of light transport paths associated with a scene;

performing, by the processor, parallel path tracing, utilizing a wavefront path tracer that uses a structure of arrays (SOA) memory layout, wherein performing the parallel path tracing further comprises regenerating one or more new light transport paths, utilizing one or more queues associated with one or more chunks.

2. The method of claim 1 , wherein the scene includes a multimedia scene.

3. The method of claim 1 , wherein each path is one of a plurality of paths that are stored within a pool accessible by the wavefront path tracer.

4. The method of claim 1 , wherein the wavefront path tracer includes a path tracer that is decomposed into a plurality of stages.

5. The method of claim 4 , wherein each of the stages of the wavefront path tracer include one or more kernels.

6. The method of claim 4 , wherein a first stage of the wavefront path tracer includes a logic stage.

7. The method of claim 6 , wherein the logic stage of the wavefront path tracer may include a single logic kernel.

8. The method of claim 7 , wherein performing the path tracing on the path includes advancing the path by one segment, utilizing the logic kernel.

9. The method of claim 7 , wherein performing the path tracing may include performing one or more additional operations, utilizing the logic kernel, where the one or more additional operations include:

calculating multiple importance sampling weights for one or more light and extension segments;

updating a throughput of an extended path;

accumulating a light sample contribution in a path radiance if a shadow ray is not blocked;

determining if a path should be terminated;

accumulating a pixel value for a terminated path;

producing a light sample for a path segment; and

determining a material at an extension ray hit point.

10. The method of claim 4 , wherein a second stage of the wavefront path tracer includes a material stage.

11. The method of claim 10 , wherein the material stage includes a new path kernel as well as one or more material kernels.

12. The method of claim 11 , wherein each of the kernels in the material stage include a queue.

13. The method of claim 12 , wherein one or more of the queues receives requests from the logic stage for the kernel associated with the queue.

14. The method of claim 11 , wherein each of the one or more material kernels is associated with a material.

15. The method of claim 10 , wherein one or more ray cast requests are generated at the material stage.

16. The method of claim 4 , wherein a third stage of the wavefront path tracer includes a ray cast stage.

17. The method of claim 16 , wherein the ray cast stage includes an extension ray cast kernel and a shadow ray cast kernel.

18. The method of claim 1 , wherein performing the parallel path tracing further comprises:

precomputing Sobol sequences for the first 32 dimensions of each of the set of light transport paths;

sharing the precomputed Sobol sequences between all pixels in the scene; and

generating a quasirandom number on a GPU by performing a first lookup from the precomputed Sobol sequences and a second lookup from a scramble value buffer and XORing the results of the first lookup with the results of the second lookup.

19. The method of claim 18 , wherein performing the parallel path tracing further comprises loading or generating chunk data, utilizing one or more chunk queues.

20. The method of claim 19 , wherein the chunk data is represented in cache memory with low latency.

21. The method of claim 18 , wherein performing the parallel path tracing further comprises allocating a memory block to store tessellation data and an acceleration hierarchy for all active processing elements.

22. The method of claim 19 , wherein a queue scheduler is associated with the one or more chunk queues and accounts for a priority associated with each light transport path.

23. The method of claim 19 , wherein a mechanism to regenerate new light transport paths when a light transport path is terminated is generalized to queue management for a partition of data chunks.

24. A method, comprising:

identifying, by a processor, a set of light transport paths associated with a scene;

performing, by the processor, parallel path tracing, utilizing a wavefront path tracer, wherein performing the parallel path tracing further comprises regenerating one or more new light transport paths, utilizing one or more queues associated with one or more chunks.

25. The method of claim 24 , wherein performing the parallel path tracing further comprises, after an execution of a trace kernel of a given chunk, removing shadow rays with a positive occlusion test from all queues of other chunks having a bounding box overlapping with the shadow ray.

26. The method of claim 1 , wherein performing the parallel path tracing further comprises:

extending eye and light paths according to sampling a material reflectance distribution; and

creating shadow tests between vertices; or

creating new bidirectional image samples upon termination of previous samples.

27. A non-transitory computer-readable storage medium storing instructions that, when executed by a processor, cause the processor to perform steps comprising:

identifying, by a processor, a set of light transport paths associated with a scene;

performing, by the processor, parallel path tracing, utilizing a wavefront path tracer that uses a structure of arrays (SOA) memory layout, wherein performing the parallel path tracing further comprises regenerating one or more new light transport paths, utilizing one or more queues associated with one or more chunks.

28. A system, comprising:

a processor for:

identifying a light transport path associated with a scene,

performing parallel path tracing, utilizing a wavefront path tracer that uses a structure of arrays (SOA) memory layout, wherein performing the parallel path tracing further comprises regenerating one or more new light transport paths, utilizing one or more queues associated with one or more chunks.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 19, 2014
From: DROSKE, MARC; SEIBERT, DANIEL JOHANNES; RADIG, STEFAN; KELLER, ALEXANDER; FLOETOTTO, JULIA; LAINE, SAMULI MATIAS; KARRAS, TERO TAPANI; AILA, TIMO OSKARI; GRUENSCHLOSS, LEONHARD
To: NVIDIA CORPORATION
Reel/Frame 034560/0066 →
Continuity (2)
Provisional Application 61823875 · May 15, 2013
Related Publication 20140340403A1 · Nov 20, 2014