Fin-type semiconductor device and manufacturing method
One embodiment of a semiconductor device includes a fin at a first side of a semiconductor body, a body region of a second conductivity type in at least a part of the fin, a drain extension region of a first conductivity type, a source region and a drain region of the first conductivity type, a source contact in contact with the source region, the source contact extending along a vertical direction along the source region, and a gate structure adjoining opposing walls of the fin. The body region and the drain extension region are arranged one after another between the source region and the drain region.
1. A semiconductor device, comprising:
a fin at a first side of a semiconductor body;
a body region of a second conductivity type in at least a part of the fin;
a drain extension region of a first conductivity type;
a source region and a drain region of the first conductivity type;
a source contact in contact with the source region; and
a gate structure adjoining opposing walls of the fin,
wherein the body region and the drain extension region are arranged one after another between the source region and the drain region, the drain extension region having a larger width than the body region, the width being measured perpendicularly with respect to a direction between the source region and the drain region.
2. The semiconductor device of claim 1 , wherein the source contact vertically extends to a bottom side of the source region.
3. The semiconductor device of claim 1 , further comprising a deep body region of the second conductivity type below the source region, wherein the source contact contacts the deep body region.
4. The semiconductor device of claim 1 , wherein the fin includes at least part of the drain extension region.
5. The semiconductor device of claim 1 , further comprising a shallow trench isolation at a top face of the fin adjoining the drain extension region.
6. The semiconductor device of claim 1 , wherein the gate structure adjoins a top face of the fin.
7. The semiconductor device of claim 1 , wherein the deep body region is electrically connected to the body region.
8. The semiconductor device of claim 1 , further comprising a drain contact in contact with the drain region, the drain contact extending along a vertical direction along the drain region.
9. An integrated circuit comprising the semiconductor device of claim 1 .
10. A semiconductor device, comprising:
a fin at a first side of a semiconductor body;
a body region of a second conductivity type in at least a part of the fin;
a drain extension region of a first conductivity type, a part of the drain extension region being disposed outside the fin;
a source region and a drain region of the first conductivity type;
a drain contact in contact with the drain region; and
a gate structure adjoining opposing walls of the fin,
wherein the body region and the drain extension region are arranged one after another between the source region and the drain region.
11. The semiconductor device of claim 10 , wherein the drain contact vertically extends to a bottom side of the drain region.
12. The semiconductor device of claim 10 , further comprising a doped layer beneath the drain region, wherein the drain contact contacts the doped layer.
13. The semiconductor device of claim 10 , wherein the fin includes at least part of the drain extension region.
14. The semiconductor device of claim 10 , wherein the gate structure adjoins the top face of the fin.
15. An integrated circuit comprising the semiconductor device of claim 10 .
16. A method of manufacturing a semiconductor device, the method comprising:
forming a fin at a first side of a semiconductor body;
forming a body region of a second conductivity type in at least a part of the fin;
forming a drain extension region of a first conductivity type;
forming a source region and a drain region of the first conductivity type and
forming a gate structure adjoining opposing walls of the fin,
wherein the body region and the drain extension region are arranged one after another between the source region and the drain region,
wherein the drain extension region is formed so as to have a larger width than the body region, the width being measured perpendicularly with respect to a direction between the source region and the drain region.
17. The method according to claim 16 , wherein forming the source region comprises diffusing dopants from a diffusion source at walls into the semiconductor body.