Structure and method to increase contact area in unmerged EPI integration for CMOS FinFETs
Source/drain contact structures with increased contact areas for a multiple fin-based complementary metal oxide semiconductor field effect transistor (CMOSFET) having unmerged epitaxial source/drain regions and methods for forming such source/drain contact structures are provided by forming wrap-around source/drain contact structures for both n-type FinFETs and p-type FinFETs. Each of first source/drain contact structures for the n-type FinFETs includes at least one first conductive plug encapsulating epitaxial first source/drain regions on one side of a gate structure, while each of second source/drain contact structures for the p-type FinFETs includes at least a contact metal layer portion encapsulating epitaxial second source/drain regions on one side of the gate structure, and a second conductive plug located over a top surface of the contact metal layer portion.
1. A semiconductor structure comprises:
a plurality of first semiconductor fins located on a first region of a substrate, wherein each of the plurality of first semiconductor fins has a channel region disposed between a pair of first epitaxial source/drain regions, wherein adjacent first epitaxial source/drain regions are separated by a first gap;
a plurality of second semiconductor fins located on a second region of the substrate, wherein each of the plurality of second semiconductor fins has a channel region disposed between a pair of second epitaxial source/drain regions, wherein adjacent epitaxial second source/drain regions are separated by a second gap;
a gate structure overlying the channel portion of each of the plurality of first semiconductor fins and the plurality of second semiconductor fins;
a pair of first source/drain contact structures electrically coupled to the first epitaxial source/drain regions located on either side of the gate structure, wherein each of the first source/drain contact structures comprises at least a first conductive plug encapsulating the first epitaxial source/drain regions on one side of the gate structure and in contact with all surfaces of the epitaxial first source/drain regions; and
a pair of second source/drain contact structures electrically coupled to the second epitaxial source/drain regions located on either side of the gate structure, wherein each of the second source/drain contact structures comprises at least a contact metal layer portion encapsulating the second epitaxial source/drain regions on one side of the gate structure and in contact with all surfaces of the second epitaxial source/drain regions and a second conductive plug located on a top surface of the contact metal layer portion.
2. The semiconductor structure of claim 1 , wherein the first region is a n-type fin field effect transistor (FinFET) region, and wherein the second region is a p-type FinFET region.
3. The semiconductor structure of claim 1 , wherein the surfaces of each of the first and the second epitaxial source/drain regions are faceted surfaces.
4. The semiconductor structure of claim 1 , wherein the first epitaxial source/drain regions comprises Si:C, and wherein the second epitaxial source/drain regions comprises SiGe.
5. The semiconductor structure of claim 1 , wherein each of the first conductive plug and the second conductive plug is selected from a group consisting of tungsten, aluminum, copper and an alloy thereof.
6. The semiconductor structure of claim 1 , wherein each of the first source/drain contact structures further comprises a first contact liner underlying the first conductive plug, the first contact liner in contact with sidewalls and a bottom surface of the first source/drain contact opening and all the surfaces of the first epitaxial source/drain regions, and wherein each of the second source/drain contact structures further comprises a second contact liner underlying the second conductive plug, the second contact liner in contact with upper portions of sidewalls of the second source/drain contact opening and the top surface of the contact metal layer portion.
7. The semiconductor structure of claim 6 , wherein each of the first contact liner and the second contact liner is selected from a group consisting of titanium, titanium nitride, tantalum, tantalum nitride, nickel, platinum, cobalt, tungsten, rhenium, palladium, erbium, hafnium, lanthanum and an alloy thereof.