Conditional signaling of picture order count timing information for video timing in video coding

1. A method for processing video data, the method comprising:

receiving a coded video sequence comprising encoded pictures of a video sequence;

receiving timing parameters for the coded video sequence that include a condition for signaling a number of clock ticks corresponding to a difference of picture order count (POC) values equal to 1 directly in at least one of a video parameter set (VPS) syntax structure referenced by the coded video sequence and a sequence parameter set (SPS) syntax structure referenced by the coded video sequence; and

processing the coded video sequence according to the timing parameters.

2. The method of claim 1 , wherein receiving the coded video sequence comprises receiving a coded bitstream comprising a sequence of bits that forms a representation of the encoded pictures, the method further comprising:

verifying conformance of the coded bitstream to a video buffering model of a coded picture buffer and a decoded picture buffer defined, at least in part, by the condition.

3. The method of claim 1 , wherein receiving the timing parameters for the coded video sequence further comprises:

receiving a time scale and a number of units in a clock tick in at least one of the VPS syntax structure and the SPS syntax structure.

4. The method of claim 1 , wherein the timing parameters comprise timing parameters for hypothetical reference decoding operations.

5. The method of claim 1 , wherein the condition does not include a dependency on a syntax element in a hypothetical reference decoder (HRD) parameters syntax structure of the VPS syntax structure or the SPS syntax structure.

6. The method of claim 1 , wherein the VPS syntax structure includes the condition.

7. The method of claim 6 , wherein the VPS syntax structure includes the condition as a vps_poc_proportional_to_timing_flag syntax element.

8. The method of claim 1 , wherein the SPS syntax structure includes the condition.

9. The method of claim 8 , wherein SPS syntax structure includes the condition as a sps_poc_proportional_to_timing_flag syntax element.

10. A method for encoding video data, the method comprising:

encoding pictures of a video sequence to generate a coded video sequence comprising the encoded pictures; and

signaling timing parameters for the coded video sequence by directly signaling a condition for signaling a number of clock ticks corresponding to a difference of picture order count (POC) values equal to 1 in at least one of a video parameter set (VPS) syntax structure referenced by the coded video sequence and a sequence parameter set (SPS) syntax structure referenced by the coded video sequence.

11. The method of claim 10 , wherein the condition does not include a dependency on a syntax element signaled in a hypothetical reference decoder (HRD) parameters syntax structure.

12. The method of claim 10 , wherein signaling the timing parameters further comprises:

signaling a time scale and a number of units in a clock tick in at least one of the VPS syntax structure and the SPS syntax structure.

13. The method of claim 10 , wherein directly signaling the condition comprises signaling the condition in the VPS syntax structure.

14. The method of claim 13 , wherein signaling the condition in the VPS syntax structure comprises signaling the condition as a vps_poc_proportional_to_timing_flag syntax element.

15. The method of claim 10 , wherein directly signaling the condition comprises signaling the condition in the SPS syntax structure.

16. The method of claim 15 , wherein signaling the condition in the SPS syntax structure comprises signaling the condition as a sps_poc_proportional_to_timing_flag syntax element.

17. The method of claim 10 , further comprising:

generating a coded bitstream comprising a sequence of bits that forms a representation of the encoded pictures,

wherein the timing parameters at least in part define a video buffering model of a coded picture buffer and a decoded picture buffer for verifying conformance of the coded bitstream.

18. The method of claim 10 , wherein the timing parameters comprise timing parameters for hypothetical reference decoding operations.

19. A device for processing video data comprising:

a memory configured to store the video data; and

a processor in communication with the memory and configured to:

receive a coded video sequence comprising encoded pictures of a video sequence;

receive timing parameters for the coded video sequence that include a condition for signaling a number of clock ticks corresponding to a difference of picture order count (POC) values equal to 1 directly in at least one of a video parameter set (VPS) syntax structure referenced by the coded video sequence and a sequence parameter set (SPS) syntax structure referenced by the coded video sequence; and

process the coded video sequence according to the timing parameters.

20. The device of claim 19 ,

wherein to receive the coded video sequence the processor is further configured to receive a coded bitstream comprising a sequence of bits that forms a representation of the encoded pictures, and

wherein the processor is further configured to verify conformance of the coded bitstream to a video buffering model of a coded picture buffer and a decoded picture buffer defined, at least in part, by the condition.

21. The device of claim 19 , wherein to receive the timing parameters for the coded video sequence the processor is further configured to receive a time scale and a number of units in a clock tick in at least one of the VPS syntax structure and the SPS syntax structure.

22. The device of claim 19 , wherein the timing parameters comprise timing parameters for hypothetical reference decoding operations.

23. The device of claim 19 , wherein the condition does not include a dependency on a syntax element in a hypothetical reference decoder (HRD) parameters syntax structure of the VPS syntax structure or the SPS syntax structure.

24. The device of claim 19 , wherein the VPS syntax structure includes the condition.

25. The device of claim 24 , wherein the VPS syntax structure includes the condition as a vps_poc_proportional_to_timing_flag syntax element.

26. The device of claim 19 , wherein the SPS syntax structure includes the condition.

27. The device of claim 26 , wherein SPS syntax structure includes the condition as a sps_poc_proportional_to_timing_flag syntax element.

28. A device for encoding video data comprising:

a memory configured to store the video data; and

a processor in communication with the memory and configured to:

encode pictures of a video sequence to generate a coded video sequence comprising the encoded pictures; and

signal timing parameters for the coded video sequence by directly signaling a condition for signaling a number of clock ticks corresponding to a difference of picture order count (POC) values equal to 1 in at least one of a video parameter set (VPS) syntax structure referenced by the coded video sequence and a sequence parameter set (SPS) syntax structure referenced by the coded video sequence.

29. The device of claim 28 , wherein the condition does not include a dependency on a syntax element signaled in a hypothetical reference decoder (HRD) parameters syntax structure.

30. The device of claim 28 , wherein to signal the timing parameters the processor is configured to signal a time scale and a number of units in a clock tick in at least one of the VPS syntax structure and the SPS syntax structure.

31. The device of claim 28 , wherein to directly signal the condition the processor is configured to signal the condition in the VPS syntax structure.

32. The device of claim 31 , wherein to signal the condition in the VPS syntax structure the processor is configured to signal the condition as a vps_poc_proportional_to_timing_flag syntax element.

33. The device of claim 28 , wherein to directly signal the condition the processor is configured to signal the condition in the SPS syntax structure.

34. The device of claim 33 , wherein to signal the condition in the SPS syntax structure the processor is configured to signal the condition as a sps_poc_proportional_to_timing_flag syntax element.

35. The device of claim 28 , wherein the processor is further configured to

generate a coded bitstream comprising a sequence of bits that forms a representation of the encoded pictures,

wherein the timing parameters at least in part define a video buffering model of a coded picture buffer and a decoded picture buffer for verifying conformance of the coded bitstream.

36. The device of claim 28 , wherein the timing parameters comprise timing parameters for hypothetical reference decoding operations.

37. A device for processing video data comprising:

means for receiving a coded video sequence comprising encoded pictures of a video sequence; and

means for receiving timing parameters for the coded video sequence that include a condition for signaling a number of clock ticks corresponding to a difference of picture order count (POC) values equal to 1 directly in at least one of a video parameter set (VPS) syntax structure referenced by the coded video sequence and a sequence parameter set (SPS) syntax structure referenced by the coded video sequence.

38. The device of claim 37 , wherein the means for receiving the coded video sequence comprise means for receiving a coded bitstream comprising a sequence of bits that forms a representation of the encoded pictures, the device further comprising:

means for verifying conformance of the coded bitstream to a video buffering model of a coded picture buffer and a decoded picture buffer defined, at least in part, by the condition.

39. The device of claim 37 , wherein the means for receiving the timing parameters for the coded video sequence further comprise:

means for receiving a time scale and a number of units in a clock tick in at least one of the VPS syntax structure and the SPS syntax structure.

40. The device of claim 37 , wherein the timing parameters comprise timing parameters for hypothetical reference decoding operations.

41. The device of claim 37 , wherein the condition does not include a dependency on a syntax element in a hypothetical reference decoder (HRD) parameters syntax structure of the VPS syntax structure or the SPS syntax structure.

42. A non-transitory computer readable storage medium storing instructions for processing video data that upon execution by one or more processors cause the one or more processors to:

receive a coded video sequence comprising encoded pictures of a video sequence;

receive timing parameters for the coded video sequence that include a condition for signaling a number of clock ticks corresponding to a difference of picture order count (POC) values equal to 1 directly in at least one of a video parameter set (VPS) syntax structure referenced by the coded video sequence and a sequence parameter set (SPS) syntax structure referenced by the coded video sequence; and

process the coded video sequence according to the timing parameters.

43. The non-transitory computer readable storage medium of claim 42 ,

wherein to receive the coded video sequence the instructions further cause the one or more processors to receive a coded bitstream comprising a sequence of bits that forms a representation of the encoded pictures, and

wherein the instructions further cause the one or more processors to verify conformance of the coded bitstream to a video buffering model of a coded picture buffer and a decoded picture buffer defined, at least in part, by the condition.

44. The non-transitory computer readable storage medium of claim 42 , wherein to receive the timing parameters for the coded video sequence the instructions further cause the one or more processors to receive a time scale and a number of units in at least one of the VPS syntax structure and the SPS syntax structure.

45. The non-transitory computer readable storage medium of claim 42 , wherein the timing parameters comprise timing parameters for hypothetical reference decoding operations.

46. The non-transitory computer readable storage medium of claim 42 , wherein the condition does not include a dependency on a syntax element in a hypothetical reference decoder (HRD) parameters syntax structure of the VPS syntax structure or the SPS syntax structure.