Semiconductor device having a gate that is buried in an active region and a device isolation film
A semiconductor device includes an active region with a first gate trench formed when a gate region is etched to a first depth, a device isolation film defining the active region and including a second gate-trench formed when a gate region is etched to a second depth, a gate buried below the first gate trench and the second gate trench, and a source plug and a drain plug formed when a conductive material is deposited in a source region and a drain region of the active region.
1. A semiconductor device comprising:
an active region including a first gate region;
a device isolation film defining the active region, and including a second gate region;
a gate buried in the first gate region and the second gate region;
a source plug buried in a source region of the active region, the source plug including a conductive material; and
a drain plug buried in a drain region of the active region, the drain plug including the conductive material,
wherein a bottom of the source plug and a bottom of the drain plug are on a lower level than a bottom of the gate buried in the first gate region.
2. The semiconductor device according to claim 1 , wherein the bottom of the source plug and the bottom of the drain plug are on a same level as a bottom of the gate buried in the second gate region.
3. The semiconductor device according to claim 2 , wherein the source plug and the drain plug include a doped polysilicon or a metal.
4. The semiconductor device according to claim 1 , wherein a channel region of the active region includes a same type of impurities as the source plug and the drain plug.
5. The semiconductor device according to claim 1 , wherein a portion of the gate buried in the first gate region has a thickness of less than 100 Å.
6. The semiconductor device according to claim 1 , further comprising:
a bit line contact plug disposed over the drain plug; and
a bit line disposed over the bit line contact plug.
7. The semiconductor device according to claim 6 , wherein the bit line contact plug and the drain plug are formed of the same material.
8. The semiconductor device according to claim 1 , wherein the active region has a protruding fin structure, and a height of the fin under the gate is greater than a height of the gate.
9. The semiconductor device according to claim 1 , further comprising:
a bit line located below the drain plug and buried in the active region.
10. The semiconductor device according to claim 1 , wherein the active region is one of a plurality of active regions arranged parallel in a line and coupled to the same gate.
11. The semiconductor device of claim 1 , wherein the source plug is located on a first side of the gate, the drain plug is disposed on a second side of the gate, and a portion of the active region between the source plug and the drain plug is a channel region, and
wherein the gate is doped with a first type of impurities, and the channel region, the source plug, and the drain plug are doped with a second type of impurities.
12. The semiconductor device according to claim 1 , wherein a channel region of the active region is located only under the gate buried in the first gate region.