Power line network system and method
Various aspects of the instant disclosure are directed towards communicating symbols over a power line carrying alternating current, based upon frequency variations in the alternating current. In accordance with some embodiments, a line driver couples data-carrying symbols over the power line, via a waveform. Variations in the alternating current are monitored and used for defining data useful for providing steps of the waveform. The accessed data entries are used to drive a line driver for modulating alternating current on the power line to account for the variations.
1. A circuit for use in a power-line communication system in which power distribution lines are used by a power plant to distribute power and communication information, using alternating current signals between power distribution stations and endpoint devices, the circuit comprising:
a signal driving circuit configured and arranged to couple data-carrying symbols over the power distribution lines, via a waveform, that carries an alternating current signal having a frequency and/or phase that varies, relative to a frequency and/or phase of previous cycles of the alternating current signal, the data-carrying symbols corresponding to respective information signals;
a signal-monitoring circuit configured and arranged for monitoring variations in the alternating current signal;
an encoding circuit configured and arranged to provide encoded parameters that define, at least in part, data for accounting for the variations; and
circuitry configured and arranged to respond to the encoding circuit by providing information to the signal driving circuit, based on the data for accounting for the variations, that causes the signal driving circuit to modulate the alternating current signal of the power distribution line with the data-carrying symbols, wherein the encoding circuit and the circuitry are configured and arranged to adjust, in response to the signal-monitoring circuit, the modulation of the alternating current signal to account for the variations.
2. The circuit of claim 1 , wherein the circuitry is configured and arranged to synthesize multi-data-bit symbols into a plurality of sine waves and to combine the sine waves to create a signal used by the signal-monitoring circuit for transmitting information over the power distribution lines.
3. The circuit of claim 1 , wherein the data-carrying symbols include multi-data-bit symbols represented by a pair of discrete-frequency signals and a phase offset between the pair of discrete-frequency signals, and the circuitry synthesizes the multi-data-bit symbols into sine-based waves that are summed to create a signal used by the signal driving circuit for transmission over the power distribution line.
4. The circuit of claim 1 , wherein the circuitry accesses data stored in a memory circuit a plurality of times wherein times between the accesses are set based upon a fixed number of waveform points or steps to be generated during a cycle of the alternating current signal.
5. The circuit of claim 1 , further including a frequency locked loop circuit, wherein the frequency locked loop circuit and the circuitry are configured and arranged with the frequency locked loop circuit to cause the circuitry to retrieve data from a memory circuit and to use the retrieved data to generate a waveform that is based on one or more specific frequencies and a certain phase relationship, wherein the generated waveform is used to adjust the modulation of the alternating current signal.
6. The circuit of claim 1 , further including a frequency locked loop circuit, wherein the frequency locked loop circuit and the circuitry are configured and arranged with the frequency locked loop circuit causing an event signal to be generated for notifying the circuitry which causes the circuitry to retrieve sine-based wave values and to use the retrieved sine-based wave values for adjusting the modulation of the alternating current signal.
7. The circuit of claim 1 , further including a frequency locked loop circuit, wherein the frequency locked loop circuit and the circuitry are configured and arranged with the frequency locked loop circuit causing an event signal to be generated for notifying the circuitry which causes the circuitry to retrieve data from a memory circuit and to use the retrieved data to generate a complex waveform that is used to adjust the modulation of the alternating current signal.
8. The circuit of claim 1 , wherein the circuitry is configured and arranged to retrieve, in response to an interrupt signal, sine-based wave values and to use the retrieved sine-based wave values to adjust the modulation of the alternating current signal.
9. The circuit of claim 1 , wherein the circuitry is configured and arranged to retrieve, in response to timing established by a polling technique, sine-based wave values and to use the retrieved sine-based wave values to adjust the modulation of the alternating current signal.
10. The circuit of claim 1 , wherein the circuitry and the signal-monitoring circuit are configured and arranged as part of a digital synthesizer.
11. The circuit of claim 1 , wherein the circuitry is further configured and arranged to generate one of a plurality of waveforms, responsive to monitored variations in the alternating current signal.
12. The circuit of claim 1 , wherein the circuitry is configured and arranged to use stepped data to provide signals to the signal driving circuit.
13. The circuit of claim 1 , wherein the circuitry is configured and arranged to use stepped data to provide signals to the signal driving circuit, and wherein the signal driving circuit uses the provided signals for modulating the alternating current signal of the power distribution line with a complex waveform.
14. A circuit for use in a power-line communication system in which power distribution lines are used by a power plant to distribute power and communication information, using alternating current signals between power distribution stations and endpoint devices, the circuit comprising:
a signal driving circuit configured and arranged to couple data-carrying symbols over the power distribution lines, via a waveform, that carries an alternating current signal having a frequency and/or phase that varies, relative to a frequency and/or phase of previous cycles of the alternating current signal, the data-carrying symbols corresponding to respective information signals;
a signal-monitoring circuit configured and arranged for monitoring variations in the alternating current signal;
an encoding circuit configured and arranged to provide encoded parameters that define, at least in part, data for accounting for the variations; and
circuitry configured and arranged to respond to the encoding circuit by providing information to the signal driving circuit based on stored pre-calculated values that are accessed by the circuitry based on the data for accounting for the variations, wherein the stored pre-calculated values are used by the circuitry to cause the signal driving circuit to modulate the alternating current signal of the power distribution line with the data-carrying symbols.
15. The circuit of claim 14 , wherein the encoding circuit and the circuitry are configured and arranged to generate a complex waveform in response to accessing the pre-calculated values.
16. The circuit of claim 14 , wherein the encoding circuit and the circuitry are configured and arranged to generate a complex waveform in response to accessing the pre-calculated values by measuring and predicting time periods of next alternating current cycles.
17. The circuit of claim 14 , wherein the data-carrying symbols are multi-data-bit symbols arranged to be transmitted by conveying a pair of discrete-frequency signals and a phase offset for each pair of discrete-frequency signals.
18. The circuit of claim 1 , wherein the circuitry is configured to determine the information by accessing pre-calculated values stored in a table.
19. The circuit of claim 18 , wherein the circuitry is configured and arranged to
select a table access rate based on duration of a cycle of the alternating current signal relative to an expected average; and
access the table at the selected table access rate to determine the information.
20. The circuit of claim 19 , wherein
the table includes a first set of data and a second set of data; and
the circuitry is configured and arranged to
determine the information from the first set of data in response to the cycle of the alternating current signal being longer than the expected average; and
determine the information from the first set of data in response to the cycle of the alternating current signal being longer than the expected average.