IP Library Granted Patent US 9,411,097
Granted Patent B2
US 9,411,097 · App. 14/727,751 · Granted Aug 9, 2016

Optical module

Inventors: Young Tak Han (Daejeon, KR); Sang Ho Park (Daejeon, KR); Yong Soon Baek (Daejeon, KR); Jang Uk Shin (Daejeon, KR)
Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
G02B6/12
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Quick Facts
Patent No.
US 9,411,097
App. No.
14/727,751
Granted
Aug 9, 2016
Kind
B2
Abstract

Provided herein is an optical module including an optical bench having a first step with a first depth and a second step with a second depth that is smaller than the first depth; a silicon carrier disposed above the first step, and where at least one semiconductor chip is installed; an AWG chip (Arrayed Waveguide Grating chip) secured to the second step, extends up to the first step, and is chip-to-chip bonded with the silicon carrier above the first step; a lens disposed on an upper surface of the optical bench where the first step and the second step are not formed; and a metal package surrounding the optical bench, silicon carrier, AWG chip and lens, wherein at one side of the metal package, a double slit that includes an upper slit and a lower slit are formed, a DC FPCB (Direct Current FPCB) extends from outside towards inside the metal package through the upper slit and is secured to a support formed on an inner surface of the upper slit, and an RF FPCB (Radio Frequency FPCB) extends from outside towards inside the metal package through the lower slit and is secured to an upper portion of the silicon carrier, and the upper slit and the lower slit of the double slit being sealed by an elastic epoxy.

Claims (58)

1. An optical module comprising:

an optical bench having a first step with a first depth and a second step with a second depth that is smaller than the first depth;

a silicon carrier disposed above the first step, and where at least one semiconductor chip is installed;

an AWG chip (Arrayed Waveguide Grating chip) secured to the second step, extending up to the first step, and being chip-to-chip bonded with the silicon carrier above the first step;

a lens disposed on an upper surface of the optical bench where the first step and the second step are not positioned; and

a metal package surrounding the optical bench, the silicon carrier, the AWG chip and the lens,

wherein at one side of the metal package, a double slit including an upper slit and a lower slit are provided,

a DC FPCB (Direct Current FPCB) extends from outside towards inside the metal package through the upper slit and is secured to a support provided on an inner surface of the upper slit, and

an RF FPCB (Radio Frequency FPCB) extends from outside towards inside the metal package through the lower slit and is secured to an upper portion of the silicon carrier.

2. The optical module according to claim 1 , wherein the upper slit and the lower slit of the double slit are sealed by an elastic epoxy.

3. The optical module according to claim 1 , wherein the silicon carrier and the AWG chip are secured to the first step and the second step, respectively, via a thermally conductive adhesive.

4. The optical module according to claim 1 , wherein a bonding pad on the DC FPCB is connected to a bonding pad on the silicon carrier by wire bonding, and

a bonding pad on the RF FPCB is connected to the bonding pad on the silicon carrier by wire bonding.

5. The optical module according to claim 1 , further comprising a thermo-electric cooler inside the metal package,

wherein the optical bench is disposed above the thermo-electric cooler.

6. The optical module according to claim 1 , wherein the semiconductor chip installed in the silicon carrier includes at least one of a semiconductor chip for optical transceiving, a capacitor chip, a thermistor chip, and an electronics.

7. The optical module according to claim 6 ,

wherein the semiconductor chip for optical transceiving includes a DML array chip (Direct Modulation Laser array chip),

the electronics includes a DML driver IC, and

a Y-branch waveguide is provided at an input end of the AWG chip, and an M-PD (Monitoring Photodiode) is provided at a point where the Y-branch waveguide ends.

8. The optical module according to claim 7 , wherein the Y-branch waveguide has a branch/tap ratio between 8% and 10%.

9. The optical module according to claim 6 ,

wherein the semiconductor chip for optical transceiving includes an EML array chip (Electro-absorption Modulator integrated Laser array chip),

the electronics includes a matching circuit unit, and

the M-PD is integrated with the EML array chip.

10. The optical module according to claim 6 ,

wherein the semiconductor chip for optical transceiving includes an R-PD (Receiver PhotoDiode), and

the electronics includes a TIA (TransImpedance Amplifier) IC.

11. An optical module comprising:

an optical bench having a first step with a first depth and a second step with a second depth that is smaller than the first depth;

a silicon carrier disposed above the first step, and where at least one semiconductor chip is installed;

an AWG chip (Arrayed Waveguide Grating chip) secured to the second step, extending up to the first step, and being chip-to-chip bonded with the silicon carrier above the first step;

a lens disposed on an upper surface of the optical bench where the first step and the second step are not positioned; and

a metal package surrounding the optical bench, the silicon carrier, the AWG chip and the lens,

wherein at one side of the metal package, a double slit including an upper slit and a lower slit are provided,

a DC FPCB (Direct Current FPCB) extends from outside towards inside the metal package through the upper slit and is secured to a first support provided on an inner surface of the upper slit, and

a first RF FPCB (Radio Frequency FPCB) extends from outside towards inside the metal package through the lower slit and is secured to a second support provided on an inner surface of the lower slit, and

a second RF FPCB (Radio Frequency FPCB) is on an upper portion of the silicon carrier and is wire bonded to the first RF FPCB.

12. The optical module according to claim 11 , wherein the upper slit and the lower slit of the double slit are sealed by an elastic epoxy.

13. The optical module according to claim 11 , wherein the silicon carrier and the AWG chip are secured to the first step and the second step, respectively, via a thermally conductive adhesive.

14. The optical module according to claim 11 ,

wherein a bonding pad on the DC FPCB is connected to a bonding pad on the silicon carrier by wire bonding, and

a bonding pad on the second RF FPCB is connected to the bonding pad on the silicon carrier by wire bonding.

15. The optical module according to claim 11 , further comprising a thermo-electric cooler inside the metal package,

wherein the optical bench is disposed above the thermo-electric cooler.

16. The optical module according to claim 11 , wherein the semiconductor chip installed in the silicon carrier includes at least one of a semiconductor chip for optical transceiving, a capacitor chip, a thermistor chip, and an electronics.

17. The optical module according to claim 16 ,

wherein the semiconductor chip for optical transceiving includes a DML array chip (Direct Modulation Laser array chip),

the electronics includes a DML driver IC, and

a Y-branch waveguide is provided at an input end of the AWG chip, and an M-PD (Monitoring Photodiode) is provided at a point where the Y-branch waveguide ends.

18. The optical module according to claim 17 , wherein the Y-branch waveguide has a branch/tap ratio between 8% and 10%.

19. The optical module according to claim 16 ,

wherein the semiconductor chip for optical transceiving includes an EML array chip (Electro-absorption Modulator integrated Laser array chip),

the electronics includes a matching circuit unit, and

the M-PD is integrated with the EML array chip.

20. The optical module according to claim 16 ,

wherein the semiconductor chip for optical transceiving includes an R-PD (Receiver PhotoDiode), and

the electronics includes a TIA (TransImpedance Amplifier) IC.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 1, 2015
From: HAN, YOUNG TAK; PARK, SANG HO; BAEK, YONG SOON; SHIN, JANG UK
To: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
Reel/Frame 035807/0512 →
Priority Claims (1)
KR 10-2014-0167781 · Nov 27, 2014 · national
Continuity (1)
Related Publication 20160154177A1 · Jun 2, 2016